0 (default): IR<" />
參數資料
型號: AD9717BCPZ
廠商: Analog Devices Inc
文件頁數: 31/80頁
文件大小: 0K
描述: IC DAC DUAL 14BIT LO PWR 40LFCSP
產品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
系列: TxDAC®
位數: 14
數據接口: 串行
轉換器數目: 2
電壓電源: 模擬和數字
功率耗散(最大): 86mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤,CSP
供應商設備封裝: 40-LFCSP-VQ(6x6)
包裝: 托盤
輸出數目和類型: 4 電流,單極
采樣率(每秒): 125M
產品目錄頁面: 785 (CN2011-ZH PDF)
AD9714/AD9715/AD9716/AD9717
Rev. A | Page 37 of 80
Register
Address
Bit
Name
Description
IRSET
0x04
7
IRSETEN
0 (default): IRSET resistor value for I channel is set by an external resistor connected
to the FADJI/AUXI pin. Nominal value for this external resistor is 16 kΩ.
1: enables the on-chip IRSET value to be changed for I channel.
5:0
IRSET[5:0]
Changes the value of the on-chip IRSET resistor for I channel; this scales the full-scale
current of the DAC in ~0.25 dB steps twos complement (nonlinear); see Figure 99.
000000 (default): IRSET = 16 kΩ.
011111: IRSET = 32 kΩ.
100000: IRSET = 8 kΩ.
111111: IRSET = 16 kΩ.
IRCML
0x05
7
IRCMLEN
0 (default): IRCML resistor value for the I channel is set by an external resistor
connected to the CMLI pin. Recommended value for this external resistor is 0 Ω.
1: enables on-chip IRCML adjustment for I channel.
5:0
IRCML[5:0]
Changes the value of the on-chip IRCML resistor for I channel; this adjusts the
common-mode level of the DAC output stage.
000000 (default): IRCML = 250 Ω.
100000: IRCML= 625 Ω.
111111: IRCML = 1 kΩ.
Q DAC Gain
0x06
5:0
Q DACGAIN[5:0]
DAC Q fine gain adjustment; alters the full-scale current as shown in Figure 100.
Default QDACGAIN = 0x00.
QRSET
0x07
7
QRSETEN
0 (default): QRSET resistor value for Q channel is set by an external resistor connected
to the FADJQ/AUXQ pin. Recommended value for this external resistor is 16 kΩ.
1: enables on-chip QRSET adjustment for Q channel.
5:0
QRSET[5:0]
Changes the value of the on-chip QRSET resistor for Q channel; this scales the full-
scale current of the DAC in ~0.25 dB steps twos complement (nonlinear); see
000000 (default): QRSET = 16 kΩ.
011111: QRSET = 32 kΩ.
100000: QRSET = 8 kΩ.
111111: QRSET = 16 kΩ.
QRCML
0x08
7
QRCMLEN
0 (default): QRCML resistor value for the Q channel is set by an external resistor
connected to CMLQ pin. Recommended value for this external resistor is 0 Ω.
1: enables on-chip QRCML adjustment for Q channel.
5:0
QRCML[5:0]
Changes the value of the on-chip QRCML resistor for Q channel; this adjusts the
common-mode level of the DAC output stage.
000000 (default): QRCML = 250 Ω.
100000: QRCML = 625 Ω.
111111: QRCML = 1 kΩ.
AUXDAC Q
0x09
7:0
QAUXDAC[7:0]
AUXDAC Q output voltage adjustment word LSBs.
0x3FF: sets AUXDAC Q output to full scale.
0x200: sets AUXDAC Q output to midscale.
0x000 (default): sets AUXDAC Q output to bottom of scale.
AUX CTLQ
0x0A
7
QAUXEN
0 (default): AUXDAC Q output disabled.
1: enables AUXDAC Q output.
6:5
QAUXRNG[1:0]
00 (default): sets AUXDAC Q output voltage range to 2 V.
01: sets AUXDAC Q output voltage range to 1.5 V.
10: sets AUXDAC Q output voltage range to 1.0 V.
11: sets AUXDAC Q output voltage range to 0.5 V.
4:2
QAUXOFS[2:0]
000 (default): sets AUXDAC Q top of range to 1.0 V.
001: sets AUXDAC Q top of range to 1.5 V.
010: sets AUXDAC Q top of range to 2.0 V.
011: sets AUXDAC Q top of range to 2.5 V.
100: sets AUXDAC Q top of range to 2.9 V.
1:0
QAUXDAC[9:8]
AUXDAC Q output voltage adjustment word MSBs (default = 00).
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