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參數(shù)資料
| 型號： | AD9772A-EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD9772A |
| 產(chǎn)品培訓(xùn)模塊： | DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | TxDAC+® |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 160M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 設(shè)置時間： | 11ns |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9772A |
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AD9772A
Rev. C | Page 22 of 40
DAC OPERATION
The 14-bit DAC, along with the 1.2 V reference and reference
control amplifier, is shown in Figure 37. The DAC consists of a
large PMOS current source array capable of providing up to
20 mA of full-scale current, IOUTFS. The array is divided into 31
equal currents that make up the five most significant bits
(MSBs). The next four bits, or middle bits, consist of 15 equal
current sources whose values are 1/16th of an MSB current
source. The remaining LSBs are binary-weighted fractions of
the middle bits’ current sources. All of these current sources are
switched to one of the two output nodes (that is, IOUTA or IOUTB) via
the PMOS differential current switches. Implementing the middle
and lower bits with current sources instead of an R-2R ladder
enhances its dynamic performance for multitone or low amplitude
signals and helps maintain the high output impedance of the DAC.
REFIO
FSADJ
250pF
REFLO
AVDD
AD9772A
RSET
2k
0.1F
ACOM
CURRENT
SOURCE
ARRAY
IOUTA
IOUTB
INTERPOLATED
DIGITAL DATA
RLOAD
VDIFF = VOUTA – VOUTB
IOUTA
IOUTB
SEGMENTED
SWITCHES
LSB
SWITCHES
1.2V REF
2.7V TO 3.6V
IREF
02253-
037
Figure 37. Block Diagram of Internal DAC, 1.2 V Reference, and Reference
Control Circuits
The full-scale output current is regulated by the reference
control amplifier and can be set from 2 mA to 20 mA via an
combination with both the reference control amplifier and
voltage reference, REFIO, sets the reference current, IREF, which
is mirrored to the segmented current sources with the proper
scaling factor. The full-scale current, IOUTFS, is exactly 32 times
the value of IREF.
DAC TRANSFER FUNCTION
The AD9772A provides complementary current outputs, IOUTA
and IOUTB. I
B
OUTA
provides a near full-scale current output, IOUTFS,
when all bits are high (that is, DAC CODE = 16,383), whereas
IOUTB
B
, the complementary output, provides no current. The
current output appearing at IOUTA and IOUTB is a function of both
the input code and I
B
OUTFS
and can be expressed as
IOUTA = (DAC CODE/16,384) × IOUTFS
(1)
IOUTB = (16,383 DAC CODE)/16,384 × IOUTFS
(2)
where DAC CODE = 0 to 16,383 (that is, decimal representation).
As previously mentioned, IOUTFS is a function of the reference
current (IREF), which is nominally set by a reference voltage
(VREFIO) and an external resistor (RSET). It can be expressed as
IOUTFS = 32 × IREF
(3)
where:
IREF = VREFIO/RSET
(4)
The two current outputs typically drive a resistive load directly
or via a transformer. If dc coupling is required, IOUTA and IOUTB
should be directly connected to matching resistive loads, RLOAD,
that are tied to analog common, ACOM. Note that RLOAD can
represent the equivalent load resistance seen by IOUTA or IOUTB, as
would be the case in a doubly terminated 50 Ω or 75 Ω cable.
The single-ended voltage output appearing at the IOUTA and IOUTB
nodes is simply
VOUTA = IOUTA × RLOAD
(5)
VOUTB = IOUTB × RLOAD
(6)
Note that the full-scale value of VOUTA and VOUTB should not
exceed the specified output compliance range of 1.25 V to
prevent signal compression. To maintain optimum distortion
and linearity performance, the maximum voltages at VOUTA and
VOUTB should not exceed ±500 mV p-p.
B
The differential voltage, VDIFF, appearing across IOUTA and IOUTB is
B
VDIFF = (IOUTA IOUTB) × RLOAD
(7)
Substituting the values of IOUTA, IOUTB, and I
B
REF
, VDIFF can be
expressed as
VDIFF = [(2 DAC CODE 16,383)/16,384] ×
(32 × RLOAD/RSET) × VREFIO
(8)
The last two equations highlight some of the advantages of
operating the AD9772A differentially. First, the differential
operation helps cancel common-mode error sources, such as
noise, distortion, and dc offsets, associated with IOUTA and IOUTB.
Second, the differential code-dependent current and
subsequent voltage, VDIFF, is twice the value of the single- ended
voltage output (that is, VOUTA or VOUTB), thus providing twice the
signal power to the load.
B
Note that the gain drift temperature performance for a single-
ended (VOUTA and VOUTB) or differential output (V
B
DIFF
) of the
AD9772A can be enhanced by selecting temperature tracking
resistors for RLOAD and RSET due to their ratiometric relationship,
as shown in Equation 8.
REFERENCE OPERATION
The AD9772A contains an internal 1.20 V band gap reference
that can easily be disabled and overridden by an external
reference. REFIO serves as either an output or input, depend-
ing on whether the internal or external reference is selected. If
REFLO is tied to ACOM, as shown in Figure 38, the internal
reference is activated, and REFIO provides a 1.20 V output. In
this case, the internal reference must be compensated externally
with a ceramic chip capacitor of 0.1 μF or greater from REFIO
to REFLO. If any additional loading is required, REFIO should
be buffered with an external amplifier having an input bias
current less than 100 nA.
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