參數(shù)資料
型號: ADAV4601BSTZ
廠商: Analog Devices Inc
文件頁數(shù): 25/60頁
文件大?。?/td> 0K
描述: IC AUDIO CODEC PROCESSOR 80-LQFP
標準包裝: 1
系列: SigmaDSP®
類型: 音頻處理器
應用: TV
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應商設備封裝: 80-LQFP(14x14)
包裝: 托盤
ADAV4601
Rev. B | Page 31 of 60
AUDIO FLOW CONTROL REGISTERS
DETAILED REGISTER DESCRIPTIONS
Address 0x0100 Mux Select 1 Register (Default: 0x0000)
Table 15.
Bit No.
Bit Name
Description
Default
Bits[15:12]
Main source mux
Source for main channel.
0000
0x0 = reserved
0x1 = ADC1
0x2 = reserved
0x3 = SDIN0
0x4 = SDIN1
0x5 = SDIN2/SRC2 Channel B
0x6 = SDIN3/SRC2 Channel C
0x7 = SRC1
0x8 = SRC2 Channel A
0x9 = reserved
0xA = reserved
Bits[11:8]
Reserved
Always write as 0 if writing to this register.
0000
Bits[7:4]
Headphone 1/AUXOUT4 output
Source for the Headphone 1/AUXOUT4 output.
0000
0x0 = reserved
0x1 = ADC1
0x2 = reserved
0x3 = SDIN0
0x4 = SDIN1
0x5 = SDIN2/SRC2 Channel B
0x6 = SDIN3/SRC2 Channel C
0x7 = SRC1
0x8 = SRC2 Channel A
0x9 = reserved
0xA = reserved
0xB = reserved
0xC = delayed main input
0xD = main input after loudness
0xE = subchannel
Bits[3:0]
AUXOUT3 output mux
Source for the AUXOUT3 output.
0000
0x0 = reserved
0x1 = ADC1
0x2 = reserved
0x3 = SDIN0
0x4 = SDIN1
0x5 = SDIN2/SRC2 Channel B
0x6 = SDIN3/SRC2 Channel C
0x7 = SRC1
0x8 = SRC2 Channel A
0x9 = reserved
0xA = reserved
0xB = reserved
0xC = delayed main input
0xD = main input after loudness
0xE = subchannel
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