參數(shù)資料
型號(hào)： ADAV801ASTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 32/60頁(yè)
文件大?。?/td> 0K
描述： IC CODEC AUDIO R-DVD 3.3V 64LQFP
標(biāo)準(zhǔn)包裝： 1
類型： 音頻編解碼器
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 2 / 2
三角積分調(diào)變： 無(wú)
動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 102 / 101
電壓 - 電源，模擬： 3 V ~ 3.6 V
電壓 - 電源，數(shù)字： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
配用： EVAL-ADAV801EBZ-ND - BOARD EVALUATION FOR ADAV801
ADAV801
Rev. A | Page 38 of 60
Transmitter Message Zeros Most Significant Byte—Address 0001111 (0x0F)
Table 43. Transmitter Message Zeros Most Significant Byte Register Bit Map
7
6
5
4
3
2
1
0
MSBZeros7
MSBZeros6
MSBZeros5
MSBZeros4
MSBZeros3
MSBZeros2
MSBZeros1
MSBZeros0
Table 44. Transmitter Message Zeros Most Significant Byte Register Bit Description
Bit Name
Description
MSBZeros[7:0]
Most significant byte of the number of zeros to be stuffed between IEC60958-3 messages (packets).
Default = 0x00.
Transmitter Message Zeros Least Significant Byte—Address 0010000 (0x10)
Table 45. Transmitter Message Zeros Least Significant Byte Register Bit Map
7
6
5
4
3
2
1
0
LSBZeros7
LSBZeros6
LSBZeros5
LSBZeros4
LSBZeros3
LSBZeros2
LSBZeros1
LSBZeros0
Table 46. Transmitter Message Zeros Least Significant Byte Register Bit Descriptions
Bit Name
Description
LSBZeros[7:0]
Least significant byte of the number of zeros to be stuffed between IEC60958-3 messages (packets). Default = 0x09.
Autobuffer—Address 0010001 (0x11)
Table 47. Autobuffer Register Bit Map
7
6
5
4
3
2
1
0
Reserved
Zero_Stuff_IU
Auto_UBits
Auto_CSBits
IU_Zeros3
IU_Zeros2
IU_Zeros1
IU_Zeros0
Table 48. Autobuffer Register Bit Descriptions
Bit Name
Description
Zero_Stuff_IU
Enables the addition or subtraction of zeros between IUs during autobuffering of the user bits in IEC60958-3 format.
0 = No zeros added or subtracted.
1 = Zeros can be added or subtracted between IUs.
Auto_UBits
Enables the user bits to be autobuffered between the AES3/S/PDIF receiver and transmitter.
0 = User bits are not autobuffered.
1 = User bits are autobuffered.
Auto_CSBits
Enables the channel status bits to be autobuffered between the AES3/S/PDIF receiver and transmitter.
0 = Channel status bits are not autobuffered.
1 = Channel status bits are autobuffered.
IU_Zeros[3:0]
Sets the maximum number of zero-stuffing to be added between IUs while autobuffering up to a maximum of 8.
0000 = 0.
0001 = 1.
…
0111 = 7.
1000 = 8.
Sample Rate Ratio MSB—Address 0010010 (0x12)
Table 49. Sample Rate Ratio MSB Register (Read-Only) Bit Map
7
6
5
4
3
2
1
0
Reserved
SRCRATIO14
SRCRATIO13
SRCRATIO12
SRCRATIO11
SRCRATIO10
SRCRATIO09
SRCRATIO08
Table 50. Sample Rate Ratio MSB Register (Read-Only) Bit Descriptions
Bit Name
Description
SRCRATIO[14:8]
Seven most significant bits of the15-bit sample rate ratio.
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ADAV801ASTZ-REEL 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
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