參數(shù)資料
型號: ADC1112D125HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 11-bit ADC; CMOS or LVDS DDR digital outputs
封裝: ADC1112D125HN/C1<SOT804-3|<<<1<Always Pb-free,;ADC1112D125HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁數(shù): 5/41頁
文件大?。?/td> 565K
代理商: ADC1112D125HN
ADC1112D125
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 3 March 2011
5 of 41
NXP Semiconductors
ADC1112D125
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
[1]
P: power supply; G: ground; I: input; O: output; I/O: input/output.
6.2 LVDS DDR outputs selected
6.2.1
Pinning
DA9
DA10
OTRA
DECA
VDDA
SENSE
VREF
VDDA
57
58
59
60
61
62
63
64
O
O
O
O
P
I
I/O
P
data output bit 9; channel A
data output bit 10 (MSB); channel A
out-of-range; channel A
regulator decoupling node; channel A
analog power supply
reference programming pin
voltage reference input/output
analog power supply
Table 2.
Symbol
Pin description (CMOS digital outputs)
…continued
Pin
Type
[1]
Description
Fig 3.
Pin configuration with LVDS DDR digital outputs selected
005aaa163
ADC1112D125
HVQFN64
Transparent top view
DB3_DB4_M
INBM
INBP
DB3_DB4_P
AGND
DB1_DB2_M
VCMB
DB1_DB2_P
REFBT
LOW_DB0_M
REFBB
LOW_DB0_P
AGND
n.c.
CLKM
n.c.
CLKP
DAVM
AGND
DAVP
REFAB
n.c.
REFAT
n.c.
VCMA
LOW_DA0_P
AGND
LOW_DA0_M
INAM
DA1_DA2_P
INAP
DA1_DA2_M
V
V
S
S
C
C
D
O
D
D
D
D
D
D
V
V
V
V
S
V
D
O
D
D
D
D
D
D
D
D
V
V
16
33
15
34
14
35
13
36
12
37
11
38
10
39
9
40
8
41
7
42
6
43
5
44
4
45
3
46
2
47
1
48
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
4
1
1
1
2
2
2
2
2
2
2
2
2
2
3
3
3
terminal 1
index area
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ADC1112D125HN/C1+551 制造商:NXP Semiconductors 功能描述:Bulk 制造商:NXP Semiconductors 功能描述:0
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