參數(shù)資料
型號: ADC1112D125HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 11-bit ADC; CMOS or LVDS DDR digital outputs
封裝: ADC1112D125HN/C1<SOT804-3|<<<1<Always Pb-free,;ADC1112D125HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁數(shù): 8/41頁
文件大小: 565K
代理商: ADC1112D125HN
ADC1112D125
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 3 March 2011
8 of 41
NXP Semiconductors
ADC1112D125
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
Clock inputs: pins CLKP and CLKM
Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
V
i(clk)dif
differential clock input voltage
Sine
V
i(clk)dif
differential clock input voltage
Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS)
V
IL
LOW-level input voltage
V
IH
HIGH-level input voltage
Logic input: pin CTRL
V
IL
LOW-level input voltage
peak-to-peak
-
±
1.6
-
V
peak-to-peak
±
0.8
±
3.0
-
V
-
0.7V
DDA
-
-
0.3V
DDA
V
-
V
-
-
-
-
10
10
0
0.3V
DDA
0.6V
DDA
V
DDA
-
-
-
-
-
-
+10
+10
V
V
V
V
μ
A
μ
A
LOW-medium level
medium-HIGH level
V
IH
I
IL
I
IH
Serial peripheral interface: pins CS, SDIO/ODS, SCLK/DFS
V
IL
LOW-level input voltage
V
IH
HIGH-level input voltage
I
IL
LOW-level input current
I
IH
HIGH-level input current
C
I
input capacitance
Digital outputs, CMOS mode: pins DA10 to DA0, DB10 to DB0, OTRA, OTRB and DAV
Output levels, V
DDO
= 3 V
V
OL
LOW-level output voltage
V
OH
HIGH-level output voltage
C
O
output capacitance
Output levels, V
DDO
= 1.8 V
V
OL
LOW-level output voltage
V
OH
HIGH-level output voltage
Digital outputs, LVDS DDR mode: pins DA9_DA10_P to LOW_DA0_P, DA9_DA10_M to LOW_DA0_M,
DB9_DB10_P to LOW_DB0_P, DB9_DB10_M to LOW_DB0_M, DAVP and DAVM
Output levels, V
DDO
= 3 V only, R
L
= 100
Ω
V
O(offset)
output offset voltage
output buffer current set to
3.5 mA
V
O(dif)
differential output voltage
output buffer current set to
3.5 mA
C
O
output capacitance
Analog inputs: pins INAP, INAM, INBP and INBM
I
I
input current
R
I
input resistance
C
I
input capacitance
V
I(cm)
common-mode input voltage
V
INAP
= V
INAM
; V
INBP
= V
INBM
HIGH-level input voltage
LOW-level input current
HIGH-level input current
0
0.7V
DDA
10
50
-
-
-
0.3V
DDA
V
V
DDA
+10
+50
-
V
μ
A
μ
A
pF
-
-
4
AGND
0.8V
DDO
-
-
-
3
0.2V
DDO
V
V
DDO
-
V
pF
high impedance; see
Table 10
AGND
0.8V
DDO
-
-
0.2V
DDO
V
V
DDO
V
-
1.2
-
V
-
350
-
mV
-
3
-
pF
5
-
-
0.9
-
19.8
2.8
1.5
+5
-
-
2
μ
A
k
Ω
pF
V
Table 6.
Symbol
Static characteristics
[1]
…continued
Parameter
Conditions
Min
Typ
Max
Unit
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