參數(shù)資料
型號: ADC12281
廠商: National Semiconductor Corporation
英文描述: 12-Bit, 20 MSPS Single-Ended Input, Pipelined A/D Converter(12位20 MSPS單端輸入管線式A/D轉(zhuǎn)換器)
中文描述: 12位,20 MSPS的單端輸入,流水線A / D轉(zhuǎn)換器(12位20 MSPS的單端輸入管線式的A / D轉(zhuǎn)換器)
文件頁數(shù): 11/16頁
文件大?。?/td> 322K
代理商: ADC12281
Typical Performance Characteristics
(V
A
= V
D
= V
D
I/O = 5V, f
CLK
= 20 MHz, unless otherwise
stated) (Continued)
Specification Definitions
CONVERSION LATENCY:
See PIPELINE DELAY.
DIFFERENTIAL NON-LINEARITY (DNL)
is the measure of
the maximum deviation from the ideal step size of 1 LSB.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE
BITS)
is another method of specifying Signal-to-Noise and
Distortion or SINAD. ENOB is defined as (SINAD -
1.76)/6.02.
FULL SCALE ERROR
is the difference between the input
voltage (V
–V
IN
) just causing a transition to positive full
scale and V
REF
1.5 LSB, where V
REF
is (V
REF+ IN
) –
(V
REF IN
).
FULL POWER BANDWIDTH
is a measure of the frequency
at which the reconstructed output fundamental drops 3 dB
below its low frequency value for a full scale input. The test
is performed with f
equal to 100 kHz plus integer multiples
of f
CLK
. The input frequency at which the output is 3 dB
relative to the low frequency input signal is the full power
bandwidth.
INTEGRAL NON-LINEARITY (INL)
is a measure of the de-
viation of each individual code from a line drawn from nega-
tive full scale (
1
2
LSB below the first code transition) through
positive full scale (the last code transition). The deviation of
any given code from this straight line is measured from the
center of that code value.
OFFSET ERROR
is the difference between the ideal LSB
transition to the actual transition point. The LSB transition
should occur when V
IN+
= V
IN
.
PIPELINE DELAY (LATENCY)
is the number of clock cycles
between initiation of conversion and the availability of that
same conversion result at the output. New data is available
at every clock cycle, but the data lags the conversion by the
pipeline delay.
SIGNAL TO NOISE RATIO (SNR)
is the ratio, expressed in
dB, of the rms value of the input signal to the rms value of the
sum of all other spectral components below one-half the
sampling frequency, not including harmonics or dc.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD)
is the ratio, expressed in dB, of the rms value of the input sig-
nal to the rms value of all of the other spectral components
below half the clock frequency, including harmonics but ex-
cluding dc.
SPURIOUS FREE DYNAMIC RANGE (SFDR)
is the differ-
ence, expressed in dB, between the rms values of the input
signal and the peak spurious signal, where a spurious signal
is any signal present in the output spectrum that is not
present at the input.
TOTAL HARMONIC DISTORTION (THD)
is the ratio, ex-
pressed in dB or dBc, of the rms total of the first six harmonic
components to the rms value of the input signal.
ZERO ERROR
is the difference between the ideal input volt-
age (
1
2
LSB) and the actual input voltage that just causes a
transition from an output code of zero to an output code of
one.
THD vs Temperature
DS101027-26
Spectral Response
@
20 MSPS
DS101027-27
A
www.national.com
11
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