DEV = fDEV
參數(shù)資料
型號(hào): ADF4158CCPZ
廠商: Analog Devices Inc
文件頁數(shù): 21/36頁
文件大?。?/td> 0K
描述: IC FRACTION N FREQ SYNT 24LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: 分?jǐn)?shù) N 合成器(RF)
PLL:
輸入: CMOS,TTL
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 2:1
差分 - 輸入:輸出: 是/無
頻率 - 最大: 6.1GHz
除法器/乘法器: 是/是
電源電壓: 2.7 V ~ 3.3 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: *
包裝: 托盤
ADF4158
Data Sheet
Rev. G | Page 28 of 36
To calculate the DEV word, use Equation 15.
DEV = fDEV/(fRES × 2DEV_OFFSET)
(15)
52
.
971
,
20
2
MHz
25
z
kH
250
4
25
=
×
=
DEV
Rounding this to 20,972 and recalculating using Equation 9 to get
the actual deviation frequency, fDEV, thus produces the following:
fDEV = (25 MHz/225) × (20,972 × 24) = 250.006 kHz
The number of fDEV steps required to cover the 50 MHz range is
50 MHz/250.006 kHz = 200. To cover the 50 MHz range in 2 ms,
the ADF4158 must hop every 2 ms/200 = 10 s.
Rearrange Equation 10 to set the timer value (and fix CLK2 to 1):
CLK1 = Timer × fPFD/CLK2 = 10 s × 25 MHz /1 = 250
To summarize the settings: DEV = 20,972, number of steps = 200,
CLK1 = 250 (12-bit CLK1 divider in R2), CLK2 = 1 (R4-CLK DIV
set as RAMP DIV). Using these settings, program the ADF4158
to a center frequency of 5800 MHz, and enable the sawtooth ramp
to produce the required waveform. If a triangular ramp was
used with the same settings, the ADF4158 would sweep from
5800 MHz to 5850 MHz and back down again. The entire sweep
would take 4 ms.
Activating the Ramp
After setting all of the previous parameters, the ramp must be
activated. It is achieved by choosing the desired type of ramp
(DB[11:10] in Register R3) and starting the ramp (DB31 = 1 in
Register R0).
Ramp Programming Sequence
Set parameters as described in the FMCW Radar Ramp Settings
Worked Example section and activate the ramp as described in
the Activating the Ramp section in the following register write
order.
1. Delay register (R7)
2. Step register (R6)
3. Deviation register (R5)
4. Test register (R4)
5. Function register (R3)
6. R-divider register (R2)
7. LSB FRAC register (R1)
8. FRAC/INT register (R0)
OTHER WAVEFORMS
Two Ramp Rates
This feature allows for two ramps with different step and deviation
settings. It also allows the ramp rate to be reprogrammed while
another ramp is running.
Example
If, for example
PLL is locked to 5790 MHz and fPFD = 25MHz.
Ramp 1 jumps 100 steps, each of which lasts 10 s and has
a frequency deviation of 100 kHz.
Ramp 2 jumps 80 steps, each of which lasts 10 s and has a
frequency deviation of 125 kHz.
Then,
1. DB24 in Register R5 should be set to 1, which activates
Ramp 2 rates mode.
2. Program Ramp 1 and Ramp 2 as follows to get two ramp rates:
Ramp 1: Register R5 DB[18:3] = 16,777, DB[22:19] = 3
with DB23 = 0; Register R6 DB[22:3] = 100, DB23 = 0.
Ramp 2: Register R5 DB[18:3] = 20,972, DB[22:19] = 3
with DB23 = 1; Register R6 DB[22:3] = 80, DB23 = 1.
The resulting ramp with two various rates is shown in Figure 36.
Eventually, the ramp must be activated as described in
F
RE
Q
UE
NCY
TIME
SWEEP RATE SET BY OTHER REGISTER
SWEEP RATE SET BY ONE REGISTER
08728-
024
Figure 36. Dual Sweep Rate
Ramp Mode with FSK Signal on Ramp
In traditional approaches a FMCW radars used either linear
frequency modulation (LFM) or FSK modulation. These
modulations used separately introduce ambiguity between
measured distance and velocity, especially in multitarget
situations. To overcome this issue and enable unambiguous
(range velocity) multitarget detection, use a ramp with
FSK on it.
Example
If, for example
PLL is locked to 5790 MHz. fPFD = 25MHz
There are 100 steps each of which lasts 10 s and has a
deviation of 100 kHz.
The FSK signal is 25 kHz.
Then,
1. Program the ramp as described in the FMCW Radar Ramp
Settings Worked Example section. While doing that DB23
in Register R5 and DB23 in Register R6 should be set to 0.
2. Set the bits in Register R5 as follows to program FSK on ramp
to 25 kHz: DB[18:3] = 4194 (deviation word), DB[22:19] = 3
(deviation offset), DB23 = 1 (deviation select for FSK on
ramp), and DB25 = 1 (ramp with FSK enabled).
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