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參數(shù)資料
| 型號： | ADM6926 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 26 port 10/100 Mbps Ethernet Switch Controller |
| 中文描述： | 26端口10/100 Mbps以太網(wǎng)交換機控制器 |
| 文件頁數(shù)： | 39/85頁 |
| 文件大小： | 4222K |
| 代理商： | ADM6926 |
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ADM6926
Function Description
Configuration
Description
Default
11= The first received packets will be locked as above. The difference is that the
receiving port will not receive and learn packets any more after the link goes
down even it links up again (it may happen if the station moves to the other
port).
Back Pressure Enable Bit.
1 = The MAC controller supports back-pressure function in half duplex.
0 = The MAC controller doesn’t support back-pressure function in half duplex.
Bit[15]
1’b1
3.2.4 Miscellaneous Configuration (Index: 1ch)
Configuration
Bit[0]
Disable CSMA/CD Back-off Function.
1 = The MAC controller will disable random back off function.
0 = The Mac controller supports random back off function.
Bit[1]
Recommend 16
th
Collision Drop.
1 = The Mac controller will drop packets when the collision count is larger than 16.
0 = The Mac controller will retransmit packets even when the collision count is
larger than 16.
Bit[2]
Bit[3]
Enable Replace VLAN ID
1 = The switch will replace the VID with the PVID associated with the receiving port
when the received packets are priority tagged or its VID in the Tag Header
equals to 1.
0 = The switch will use the original VID received from the Tag Header.
Bit[7:4]
Bit[8]
Bit[9]
Collision LED Enable.
1 = The switch will provide two collision LEDs for 10M and 100M domain
individually and flash in rate of 2Hz.
0 = The switch will not provide two collision LEDs for 10M and 100M domain
individually.
Bit[10]
Bit[11]
Bit[12]
Bit[13]
3.2.5 VLAN(TOS) Priority Map (Index: 1dh)
Configuration
Bit[0]
Mapped Priority Queue of Tag Value 0
1 = Mapped for the High Queue
0 = Mapped for the Low Queue
Bit[1]
Mapped Priority Queue of Tag Value 1
1 = Mapped for the High Queue
0 = Mapped for the Low Queue
Bit[2]
Mapped priority Queue of Tag Value 2
1 = Mapped for the High Queue
0 = Mapped for the Low Queue
Bit[3]
Mapped Priority Queue of Tag Value 3
1 = Mapped for the High Queue
0 = Mapped for the Low Queue
Bit[4]
Mapped Priority Queue of Tag Value 4
1 = Mapped for High Queue
0 = Mapped for Low Queue
Bit[5]
Mapped Priority Queue of Tag Value 5
Description
Default
1’b0
1’b0
Reserved
’
1’b0
Reserved
Reserved
4’b0010
1’b0
1’b0
Reserved
Reserved
Reserved
Reserved
1’b0
1’b0
1’b0
1’b0
ADMtek Inc.
3-23
Description
Default
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
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