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| 型號： | ADP5587ACBZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/24頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER/KEYBRD CTRLR |
| 產(chǎn)品變化通告： | 8mm Carrier Tape Changes 28/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | I²C 端口擴(kuò)展器 |
| 應(yīng)用： | 移動(dòng)電話 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 25-UFBGA，WLCSP |
| 供應(yīng)商設(shè)備封裝： | 25-WLCSP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 配用： | ADP5587CP-EVALZ-ND - EVAL BOARD FOR ADP5587 |
| 其它名稱： | ADP5587ACBZ-R7DKR |
ADP5587
Data Sheet
Rev. D | Page 14 of 24
I2C PROGRAMMING AND DIGITAL CONTROL
The ADP5587 provides full I2C software programmability to
facilitate its adoption in various product architectures. All
register programming is done via the I2C bus. The LFCSP
package has two options for I2C addressing.
The default part option I2C write address is located at 0x68
(0b01101000), and the read address is at 0x69 (0b 01101001).
The ADP5587ACPZ-1-R7 has the I2C write address at 0x60 (0b
01100000) and the read address at 0x61 (0b 01100001).
All communication to the ADP5587 is performed via its I2C-
compatible serial interface. Figure 16 shows a typical write
sequence for programming an internal register. The cycle
begins with a start condition followed by the chip write address.
The ADP5587 acknowledges the chip write address byte by
pulling the data line low. The address of the register to which
data is to be written is sent next. The ADP5587 acknowledges
the register address byte by pulling the data line low. The data
byte to be written is sent next. The ADP5587 acknowledges the
data byte by pulling the data line low, and a stop condition
completes the sequence.
Figure 17 shows a typical read sequence for reading back an
internal register. The cycle begins with a start condition
followed by the chip write address. The ADP5587 acknowledges
the chip write address byte by pulling the data line low. The
address of the register from which data is to be read is sent next.
The ADP5587 acknowledges the register address byte by pulling
the data line low. The cycle continues with a repeat start
followed by the chip read address. The ADP5587 acknowledges
the chip read address byte by pulling the data line low. The
ADP5587 places the contents of the previously addressed
register on the bus for readback. There is no acknowledge
following the readback data byte, and a stop condition
completes the cycle.
SUBADDRESS
CHIP ADDRESS 1
ST
0
1
0
1
0
0 SP
0 = WRITE
A
D
P
5587
ACK
A
D
P
5587
ACK
ADP5587 RECEIVES D ATA
A
D
P
5587
ACK
0
08612-
012
1DEFAULT WRITE ADDRESS IS 0x68. OPTION 1 WRITE ADDRESS IS 0x60.
Figure 16. I2C Write Sequence
SUBADDRESS
CHIP ADDRESS 1
CHIP ADDRESS 2
ST
0
1
0
1
0
1
0
ST
0
1
0
1
0
1 SP
1 = READ
ADP
5
8
7
NO
ACK
ADP5587 SENDS DATA
ADP
5
8
7
ACK
ADP
5
8
7
ACK
ADP
5
8
7
ACK
0 = WRITE
0
1
08612-
013
1DEFAULT WRITE ADDRESS IS 0x68. OPTION 1 WRITE ADDRESS IS 0x60.
2DEFAULT READ ADDRESS IS 0x69. OPTION 1 READ ADDRESS IS 0x61.
Figure 17. I2C Read and Write Sequences
READ START ADDR
CHIP ADDRESS
CHIP ADDRESS 1
ST 0
1
0
1
0
1
0
ST 0
1
0
1
0
1 = READ
ADP
5
8
7
ACK
ADP5587 SENDS DATA 1
ADP
5
8
7
ACK
ADP
5
8
7
ACK
ADP
5
8
7
ACK
0 = WRITE
0
1
ADP
5
8
7
NO
ACK
1
ADP5587 SENDS DATA N
...
ST
O
P
S
T
ART
08612-
014
1DEFAULT READ ADDRESS IS 0x69. OPTION 1 READ ADDRESS IS 0x61.
Figure 18. I2C Read Auto-Increment
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| ADP5587ACPZ-1-R7 | 功能描述:IC I/O EXPANDER/KEYBRD CTRLR RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
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| ADP5588 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Keypad I/O Expander |
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