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參數(shù)資料
| 型號： | ADP5587ACBZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/24頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER/KEYBRD CTRLR |
| 產(chǎn)品變化通告： | 8mm Carrier Tape Changes 28/Feb/2012 |
| 標準包裝： | 1 |
| 類型： | I²C 端口擴展器 |
| 應(yīng)用： | 移動電話 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 25-UFBGA，WLCSP |
| 供應(yīng)商設(shè)備封裝： | 25-WLCSP |
| 包裝： | 標準包裝 |
| 配用： | ADP5587CP-EVALZ-ND - EVAL BOARD FOR ADP5587 |
| 其它名稱： | ADP5587ACBZ-R7DKR |
Data Sheet
ADP5587
Rev. D | Page 17 of 24
Table 18. INT_STAT—Register 0x02 (Interrupt Status Register)
Field
Bits
Description
Not Used
[7:4]
N/A
OVR_FLOW_INT1
3
Overflow interrupt status. When set, write 1 to clear.
1: overflow interrupt is detected.
0: overflow interrupt is not detected.
K_LCK_INT2
2
Keylock interrupt status. When set, write 1 to clear.
1: keylock interrupt is detected.
0: keylock interrupt is not detected.
GPI_INT1, 3
1
GPI interrupt status. When set, write 1 to clear.
1: GPI interrupt is detected.
0: GPI interrupt is not detected.
KE_INT1, 3
0
Key events interrupt status. When set, write 1 to clear.
1: key events interrupt is detected.
0: key events interrupt is not detected.
1
The KE_INT, GPI_INT, and OVR_FLOW_INT bits reflect the status of the interrupts when the interrupt types are enabled even if the processor interrupt is masked.
2
The K_LCK_INT bit is the interrupt to the processor when the keypad lock sequence is triggered.
3
If there is a pending key event or GPI interrupt in their respective registers, KE_INT is not cleared until the FIFO is empty, and GPI_INT is not cleared until the cause of
the interrupt is resolved. The host must write a 1 to the KE_INT and GPI_INT bits to clear them.
Table 19. KEY_LCK_EC_STAT—Register 0x03 (Keylock and Event Counter Register)
Field
Bits
Description
K_LCK_EN
[6]
0: lock feature is disabled.
1: lock feature is enabled.
LCK2, LCK1
[5:4]
Keypad lock status[1:0] (00 = unlocked; 11 = locked; read-only bits).
KEC1
[3:0]
Key event count of key event register.
1
The KEC field indicates the key event count of key event registers that have values in the bit (KEC(0000) = 0 events, KEC(0001) = 1 event, KEC(1010) = 10 events). As the
key events are read and cleared, the state machine automatically reduces the event count in KEC.
Table 20. KEY_EVENTx—Register 0x04 to Register 0x0D (Key Event Register A to Key Event Register J)1
Register Name
Register Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
KEY_EVENTA
(Register 0x04)
Key Event Register A status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KA7
KA6
KA5
KA4
KA3
KA2
KA1
KA0
KEY_EVENTB
(Register 0x05)
Key Event Register B status (KE[6:0] = key number),
KP[7 ] = 0: released, 1: pressed (cleared on read)
KB7
KB6
KB5
KB4
KB3
KB2
KB1
KB0
KEY_EVENTC
(Register 0x06)
Key Event Register C status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KC7
KC6
KC5
KC4
KC3
KC2
KC1
KC0
KEY_EVENTD
(Register 0x07)
Key Event Register D status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KD7
KD6
KD5
KD4
KD3
KD2
KD1
KD0
KEY_EVENTE2
(Register 0x08)
Key Event Register E status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KE7
KE6
KE5
KE4
KE3
KE2
KE1
KE0
KEY_EVENTF
(Register 0x09)
Key Event Register F status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KF7
KF6
KF5
KF4
KF3
KF2
KF1
KF0
KEY_EVENTG
(Register 0x0A)
Key Event Register G status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KG7
KG6
KG5
KG4
KG3
KG2
KG1
KG0
KEY_EVENTH
(Register 0x0B)
Key Event Register H status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KH7
KH6
KH5
KH4
KH3
KH2
KH1
KH0
KEY_EVENTI
(Register 0x0C)
Key Event Register I status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KI7
KI6
KI5
KI4
KI3
KI2
KI1
KI0
KEY_EVENTJ
(Register 0x0D)
Key Event Register J status (KE[6:0] = key number),
KP[7] = 0: released, 1: pressed (cleared on read)
KJ7
KJ6
KJ5
KJ4
KJ3
KJ2
KJ1
KJ0
1
Data in key event registers is provided as a FIFO, where data is sequentially provided on each read, regardless of an event register read. The user can read the
KEY_EVENTA register only for an event count or can read registers sequentially.
2
KE[6:0] reflects the value 1 to 80 for key press events and the value 97 to 114 for GPI events. For KE[7:0], 0 = key released event, 1 = key pressed event. For GPIEM_CFG,
0 reflects a change in the GPI from GPI_INT_LVL = true to GPI_INT_LVL = false; 1 reflects a change in the GPI in which the GPI_INT_LVL condition becomes true.
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