- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19463 > ADSP-21065LCSZ-240 (Analog Devices Inc)IC DSP CONTROLLER 32BIT 208-MQFP PDF資料下載
參數(shù)資料
| 型號： | ADSP-21065LCSZ-240 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 32BIT 208-MQFP |
| 產(chǎn)品培訓(xùn)模塊： | SHARC Processor Overview |
| 標準包裝： | 1 |
| 系列： | SHARC® |
| 類型： | 浮點 |
| 接口： | 主機接口，串行端口 |
| 時鐘速率： | 60MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 64kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 100°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 208-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 208-MQFP（28x28） |
| 包裝： | 托盤 |
| 其它名稱： | ADS-P21065LCSZ240 ADS-P21065LCSZ240-ND |
第1頁當前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
REV. C
ADSP-21065L
–10–
Pin
Type
Function
SDA10
O/T
SDRAM A10 Pin. Enables applications to refresh an SDRAM in parallel with a host access.
XTAL
O
Crystal Oscillator Terminal. Used in conjunction with CLKIN to enable the ADSP-21065L’s
internal clock generator or to disable it to use an external clock source. See CLKIN.
PWM_EVENT
1-0
I/O/A
PWM Output/Event Capture. In PWMOUT mode, is an output pin and functions as a timer
counter. In WIDTH_CNT mode, is an input pin and functions as a pulse counter/event capture.
VDD
P
Power Supply; nominally +3.3 V dc. (33 pins)
GND
G
Power Supply Return. (37 pins)
NC
Do Not Connect. Reserved pins that must be left open and unconnected. (7 pins)
CLOCK SIGNALS
The ADSP-21065L can use an external clock or a crystal. See
CLKIN pin description. You can configure the ADSP-21065L
to use its internal clock generator by connecting the necessary
components to CLKIN and XTAL. You can use either a crystal
operating in the fundamental mode or a crystal operating at an
overtone. Figure 4 shows the component connections used for a
crystal operating in fundamental mode, and Figure 5 shows
the component connections used for a crystal operating at an
overtone.
CLKIN
X1
XTAL
C1
C2
SUGGESTED COMPONENTS FOR 30 MHz OPERATION:
ECLIPTEK EC2SM-33-30.000M (SURFACE MOUNT PACKAGE)
ECLIPTEK EC-33-30.000M (THROUGH-HOLE PACKAGE)
C1 = 33pF
C2 = 27pF
NOTE: C1 AND C2 ARE SPECIFIC TO CRYSTAL SPECIFIED FOR X1.
CONTACT CRYSTAL MANUFACTURER FOR DETAILS.
Figure 4. 30 MHz Operation (Fundamental Mode Crystal)
CLKIN
XTAL
C1
C2
SUGGESTED COMPONENTS FOR 30MHz OPERATION:
ECLIPTEK EC2SM-T-30.000M (SURFACE MOUNT PACKAGE)
ECLIPTEK ECT-30.000M (THROUGH-HOLE PACKAGE)
C1 = 18pF
C2 = 27pF
C3 = 75pF
L1 = 3300nH
RS = SEE NOTE.
NOTE: C1, C2, C3, RS AND L1 ARE SPECIFIC TO CRYSTAL SPECIFIED
FOR X1. CONTACT MANUFACTURER FOR DETAILS.
C3
RS
L1
X1
Figure 5. 30 MHz Operation (3rd Overtone Crystal)
TARGET BOARD CONNECTOR FOR EZ-ICE PROBE
The ADSP-2106x EZ-ICE emulator uses the IEEE 1149.1
JTAG test access port of the ADSP-2106x to monitor and con-
trol the target board processor during emulation. The EZ-ICE
probe requires the ADSP-2106x’s CLKIN, TMS, TCK,
TRST,
TDI, TDO,
EMU and GND signals be made accessible on the
target system via a 14-pin connector (a 2 row x 7 pin strip header)
such as that shown in Figure 6. The EZ-ICE probe plugs directly
onto this connector for chip-on-board emulation. You must add
this connector to your target board design if you, intend to use
the ADSP-2106x EZ-ICE.
The total trace length between the EZ-ICE connector and the
furthest device sharing the EZ-ICE JTAG pins should be lim-
ited to 15 inches maximum for guaranteed operation. This
restriction on length must include EZ-ICE JTAG signals, which
are routed to one or more 2106x devices or to a combination of
2106xs and other JTAG devices on the chain.
The 14-pin, 2-row pin strip header is keyed at the Pin 3 loca-
tion—you must remove Pin 3 from the header. The pins must
be 0.025 inch square and at least 0.20 inch in length. Pin spac-
ing should be 0.1
0.1 inches. Pin strip headers are available
from vendors such as 3M, McKenzie and Samtec.
TOP VIEW
13
14
11
12
910
9
78
5
6
34
12
EMU
CLKIN (OPTIONAL)
TMS
TCK
TRST
TDI
TDO
GND
KEY (NO PIN)
BTMS
BTCK
BTRST
BTDI
GND
Figure 6. Target Board Connector for ADSP-2106x EZ-ICE
(JTAG Header)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TAP225M050CRW | CAP TANT 2.2UF 50V 20% RADIAL |
| VE-B1J-CX-B1 | CONVERTER MOD DC/DC 36V 75W |
| GEC08DRTH-S13 | CONN EDGECARD 16POS .100 EXTEND |
| ADSP-21065LKSZ-264 | IC DSP CONTROLL 544KBIT 208-MQFP |
| GEC06DRES-S13 | CONN EDGECARD 12POS .100 EXTEND |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-21065LKCA-240 | 功能描述:IC DSP CTLR 32BIT 196CSPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21065LKCA-264 | 功能描述:IC DSP CTLR 32BIT 196CSPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21065LKCAZ240 | 功能描述:IC DSP CTLR 32BIT 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-21065LKCAZ-240 | 制造商:Analog Devices 功能描述:DSP SEMICONDUCTOR ((NS)) |
| ADSP-21065LKCAZ240 | 制造商:Analog Devices 功能描述:IC 32-BIT DSP |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。