參數(shù)資料
型號(hào): ADSP-2181KSTZ-160
廠商: Analog Devices Inc
文件頁數(shù): 5/32頁
文件大?。?/td> 0K
描述: IC DSP CONTROLLER 16BIT 128TQFP
產(chǎn)品變化通告: Mold Change 11/Jul/2012
標(biāo)準(zhǔn)包裝: 1
系列: ADSP-21xx
類型: 定點(diǎn)
接口: 同步串行端口(SSP)
時(shí)鐘速率: 40MHz
非易失內(nèi)存: 外部
芯片上RAM: 80kB
電壓 - 輸入/輸出: 5.00V
電壓 - 核心: 5.00V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-TQFP(14x20)
包裝: 托盤
ADSP-2181
–13–
REV. D
ESD SENSITIVITY
The ADSP-2181 is an ESD (electrostatic discharge) sensitive device. Electrostatic charges readily
accumulate on the human body and equipment and can discharge without detection. Permanent
damage may occur to devices subjected to high energy electrostatic discharges.
The ADSP-2181 features proprietary ESD protection circuitry to dissipate high energy discharges
(Human Body Model). Per method 3015 of MIL-STD-883, the ADSP-2181 has been classified as
a Class 1 device.
Proper ESD precautions are recommended to avoid performance degradation or loss of function-
ality. Unused devices must be stored in conductive foam or shunts, and the foam should be
discharged to the destination before devices are removed.
TIMING PARAMETERS
GENERAL NOTES
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, you cannot
meaningfully add up parameters to derive longer times.
TIMING NOTES
Switching Characteristics specify how the processor changes its
signals. You have no control over this timing—circuitry external
to the processor must be designed for compatibility with these
signal characteristics. Switching characteristics tell you what the
processor will do in a given circumstance. You can also use switch-
ing characteristics to ensure that any timing requirement of a
device connected to the processor (such as memory) is satisfied.
Timing Requirements apply to signals that are controlled by cir-
cuitry external to the processor, such as the data input for a read
operation. Timing requirements guarantee that the processor
operates correctly with other devices.
MEMORY TIMING SPECIFICATIONS
The table below shows common memory device specifications
and the corresponding ADSP-2181 timing parameters, for your
convenience.
Memory
ADSP-2181 Timing
Device
Timing
Parameter
Specification
Parameter
Definition
Address Setup to
tASW
A0–A13,
xMS Setup before
Write Start
WR Low
Address Setup to
tAW
A0–A13,
xMS Setup before
Write End
WR Deasserted
Address Hold Time
tWRA
A0–A13,
xMS Hold after
WR Deasserted
Data Setup Time
tDW
Data Setup before
WR
High
Data Hold Time
tDH
Data Hold after
WR High
OE to Data Valid
tRDD
RD Low to Data Valid
Address Access Time tAA
A0–A13,
xMS to Data Valid
xMS = PMS, DMS, BMS, CMS, IOMS.
FREQUENCY DEPENDENCY FOR TIMING
SPECIFICATIONS
tCK is defined as 0.5tCKI. The ADSP-2181 uses an input clock
with a frequency equal to half the instruction rate: a 16.67 MHz
input clock (which is equivalent to 60 ns) yields a 30 ns proces-
sor cycle (equivalent to 33 MHz). tCK values within the range of
0.5tCKI period should be substituted for all relevant timing pa-
rameters to obtain the specification value.
Example: tCKH = 0.5tCK – 7 ns = 0.5 (25 ns) – 7 ns = 8 ns
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Output Voltage Swing . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range (Ambient) . . . . –40
°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature (5 sec) TQFP . . . . . . . . . . . . . . . . +280
°C
Lead Temperature (5 sec) PQFP . . . . . . . . . . . . . . . . . +280
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only; functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
WARNING!
ESD SENSITIVE DEVICE
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