參數(shù)資料
型號: ADSP-TS201SABPZ050
廠商: Analog Devices Inc
文件頁數(shù): 31/48頁
文件大小: 0K
描述: IC PROCESSOR 500MHZ 576BGA
標準包裝: 1
系列: TigerSHARC®
類型: 定點/浮點
接口: 主機接口,連接端口,多處理器
時鐘速率: 500MHz
非易失內(nèi)存: 外部
芯片上RAM: 3MB
電壓 - 輸入/輸出: 2.50V
電壓 - 核心: 1.05V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 576-BBGA 裸露焊盤
供應商設(shè)備封裝: 576-BGA-ED(25x25)
包裝: 托盤
配用: ADZS-TS201S-EZLITE-ND - KIT LITE EVAL FOR ADSP-TS201S
ADSP-TS201S
Rev. C
|
Page 37 of 48
|
December 2006
TEST CONDITIONS
The ac signal specifications (timing parameters) appear in
Table 29 on Page 28. These include output disable time, output
enable time, and capacitive loading. The timing specifications
for the DSP apply for the voltage reference levels in Figure 34.
Output Disable Time
Output pins are considered to be disabled when they stop driv-
ing, go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by
ΔV is dependent on the capacitive load, CL and the
load current, IL. This decay time can be approximated by the fol-
lowing equation:
The output disable time tDIS is the difference between
tMEASURED_DIS and tDECAY as shown in Figure 35. The time
tMEASURED_DIS is the interval from when the reference signal
switches to when the output voltage decays
ΔV from the mea-
sured output high or output low voltage. tDECAY is calculated
with test loads CL and IL, and with
ΔV equal to 0.4 V.
Figure 31. Typical Drive Currents at Strength 5
Figure 32. Typical Drive Currents at Strength 6
Figure 33. Typical Drive Currents at Strength 7
OUTPUT PIN VOLTAGE (V)
02.8
0.4
0.8
1.2
1.6
2.0
2.4
O
U
T
P
U
T
P
IN
C
U
R
E
N
T
(m
A
)
–11
0
11
V
DD_IO = 2.38V, +105°C
–22
–33
–44
–66
22
33
44
66
88
STRENGTH 5
V
DD_IO =2.5V, +25°C
V
DD_IO =2.63V, –40°C
IOL
I
OH
VDD_IO = 2.38V, +105°C
V
DD_IO =2.5V, +25°C
V
DD_IO = 2.63V, –40°C
77
55
–55
–88
–77
OUTPUT PIN VOLTAGE (V)
02.8
0.4
0.8
1.2
1.6
2.0
2.4
O
U
T
P
U
T
P
IN
C
U
R
E
N
T
(m
A
)
0
10
20
V
DD_IO = 2.38V, +105°C
–10
–20
–30
–40
–100
30
40
50
60
100
STRENGTH 6
V
DD_IO =2.5V, +25°C
V
DD_IO =2.63V, –40°C
I
OL
I
OH
V
DD_IO =2.38V, +105°C
V
DD_IO =2.5V, +25°C
V
DD_IO = 2.63V, –40°C
70
80
90
–50
–60
–70
–80
–90
OUTPUT PIN VOLTAGE (V)
02.8
0.4
0.8
1.2
1.6
2.0
2.4
O
U
T
P
U
T
P
IN
C
U
R
E
N
T
(m
A
)
–10
0
10
V
DD_IO = 2.38V, +105°C
–20
–30
–40
–50
–110
20
30
40
50
110
STRENGTH 7
V
DD_IO =2.5V, +25°C
V
DD_IO = 2.63V, –40°C
I
OL
IOH
V
DD_IO = 2.38V, +105°C
V
DD_IO =2.5V, +25°C
V
DD_IO =2.63V, –40°C
60
70
80
90
100
–60
–70
–80
–90
–100
Figure 34. Voltage Reference Levels for AC Measurements
(Except Output Enable/Disable)
Figure 35. Output Enable/Disable
INPUT
OR
OUTPUT
1.25V
tDECAY
CL V
Δ
() I
L
=
REFERENCE
SIGNAL
tDIS
OUTPUT STARTS
DRIVING
VOH (MEASURED) – V
VOL (MEASURED) + V
tMEASURED_DIS
VOH (MEASURED)
VOL (MEASURED)
1.65V
0.85V
HIGH IMPEDANCE STATE.
TEST CONDITIONS CAUSE THIS
VOLTAGE TO BE APPROXIMATELY 1.25V.
OUTPUT STOPS
DRIVING
tDECAY
tENA
tMEASURED_ENA
tRAMP
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