參數(shù)資料
型號(hào): ADT7463
廠商: Analog Devices, Inc.
英文描述: dB COOL Remote Thermal Controller and Voltage Monitor
中文描述: 分貝超酷的遠(yuǎn)程熱控制器和電壓監(jiān)視器
文件頁(yè)數(shù): 28/53頁(yè)
文件大?。?/td> 719K
代理商: ADT7463
REV. 0
–28–
ADT7463
PWM1 CONFIGURATION (REG. 0x5C)
<2:0> SPIN
These bits control the Start-Up timeout for
PWM1.
000 = No startup timeout
001 = 100 ms
010 = 250 ms (default)
011 = 400 ms
100 = 667 ms
101 = 1 s
110 = 2 s
111 = 4 s
PWM2 CONFIGURATION (REG. 0x5D)
<2:0> SPIN
These bits control the Start-Up timeout for
PWM2.
000 = No startup timeout
001 = 100 ms
010 = 250 ms (default)
011 = 400 ms
100 = 667 ms
101 = 1 s
110 = 2 s
111 = 4 s
PWM3 CONFIGURATION (REG. 0x5E)
<2:0> SPIN
These bits control the Start-Up timeout for
PWM3.
000 = No startup timeout
001 = 100 ms
010 = 250 ms (default)
011 = 400 ms
100 = 667 ms
101 = 1 s
110 = 2 s
111 = 4 s
Disabling Fan Start-Up Timeout
Although Fan Start-Up makes fan spin-ups much quieter than
fixed-time spin-ups, the option exists to use fixed spin-up
times. Bit 5 (FSPDIS) = 1 in Configuration Register 1 (Reg.
0x40) disables the spin-up for two TACH pulses. Instead, the
fan will spin up for the fixed time as selected in Registers
0x5C–0x5E.
PWM Logic State
The PWM outputs can be programmed high for 100% duty
cycle (noninverted) or low for 100% duty cycle (inverted).
PWM1 Configuration (Reg. 0x5C)
<4> INV
0 = logic high for 100% PWM duty cycle
1 = logic low for 100% PWM duty cycle
PWM2 Configuration (Reg. 0x5D)
<4> INV
0 = logic high for 100% PWM duty cycle
1 = logic low for 100% PWM duty cycle
PWM3 Configuration (Reg. 0x5E)
<4> INV
0 = logic high for 100% PWM duty cycle
1 = logic low for 100% PWM duty cycle
PWM Drive Frequency
The PWM drive frequency can be adjusted for the application.
Registers 0x5F–0x61 configure the PWM frequency for
PWM1–PWM3, respectively.
PWM1 FREQUENCY REGISTERS (REG. 0x5F–0x61)
<2:0> FREQ
000 = 11.0 Hz
001 = 14.7 Hz
010 = 22.1 Hz
011 = 29.4 Hz
100 = 35.3 Hz (default)
101 = 44.1 Hz
110 = 58.8 Hz
111 = 88.2 Hz
Fan Speed Control
The ADT7463 can control fan speed using two different modes.
The first is Automatic Fan Speed Control Mode. In this mode
fan speed is automatically varied with temperature and without
CPU intervention, once initial parameters are set up. The
advantage of this is in the case of the system hanging, the user is
guaranteed that the system is protected from overheating. The
Automatic Fan Speed Control incorporates a feature called
Dynamic T_min calibration. This feature reduces the design
effort required to program the Automatic Fan Speed Control
Loop. For more information and how to program the Automatic
Fan Speed Control Loop and Dynamic T_min calibration, see
the Automatic Fan Speed Control Loop application note.
The second fan speed control method is Manual Fan Speed
Control which is described in the next paragraph.
Manual Fan Speed Control
The ADT7463 allows the Duty Cycle of any PWM output to be
manually adjusted. This can be useful if you wish to change fan
speed in software or want to adjust PWM duty cycle output for
test purposes. Bits <7:5> of Registers 0x5C–0x5E (PWM Con-
figuration) control the behavior of each PWM output.
PWM CONFIGURATION (REG. 0x5C–0x5E)
<7:5> BHVR
111 = Manual Mode
Once under Manual Control, each PWM output may be manu-
ally updated by writing to registers 0x30–0x32 (PWMx Current
Duty Cycle Registers).
Programming the PWM
Current Duty Cycle Registers
The PWM
Current Duty Cycle Registers are 8-bit registers that
allow the PWM duty cycle for each output to be set anywhere
from 0% to 100% in steps of 0.39%.
The value to be programmed into the PWM
MIN
register is
given by:
Example 1:
For a PWM duty cycle of 50%,
Value (decimal)
= 50/0.39 = 128 decimal
Value = 128 decimal or 0x80.
Example 2:
For a PWM duty cycle of 33%,
Value (decimal)
= 33/0.39 = 85 decimal
Value = 85 decimal or 0x54.
PWM DUTY CYCLE REGISTERS
Reg. 0x30 PWM1 Duty Cycle = 0xFF (100% default)
Reg. 0x31 PWM2 Duty Cycle = 0xFF (100% default)
Reg. 0x32 PWM3 Duty Cycle = 0xFF (100% default)
Value decimal
PWM
MIN
)
=
0 39
.
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