參數(shù)資料
型號: ADUC7023BCPZ62I-RL
廠商: Analog Devices Inc
文件頁數(shù): 11/96頁
文件大?。?/td> 0K
描述: IC MCU 12BIT 62KB FLASH 32LFCSP
標準包裝: 5,000
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 44MHz
連通性: I²C,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
RAM 容量: 2K x 32
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 4x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 32-WFQFN 裸露焊盤,CSP
包裝: 帶卷 (TR)
Data Sheet
ADuC7023
| Page 19 of 96
TERMINOLOGY
ADC SPECIFICATIONS
Integral Nonlinearity (INL)
The maximum deviation of any code from a straight line
passing through the endpoints of the ADC transfer function.
The endpoints of the transfer function are zero scale, a point
LSB below the first code transition, and full scale, a point
LSB above the last code transition.
Differential Nonlinearity (DNL)
The difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
The deviation of the first code transition (0000 . . . 000) to
(0000 . . . 001) from the ideal, that is, + LSB.
Gain Error
The deviation of the last code transition from the ideal AIN
voltage (full scale 1.5 LSB) after the offset error has been
adjusted out.
Signal to (Noise + Distortion) Ratio
The measured ratio of signal to (noise + distortion) at the
output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the
quantization noise.
The theoretical signal to (noise + distortion) ratio for an ideal
N-bit converter with a sine wave input is given by
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
Thus, for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion
The ratio of the rms sum of the harmonics to the fundamental.
DAC SPECIFICATIONS
Relative Accuracy
Otherwise known as endpoint linearity, relative accuracy is a
measure of the maximum deviation from a straight line passing
through the endpoints of the DAC transfer function. It is
measured after adjusting for zero error and full-scale error.
Voltage Output Settling Time
The amount of time it takes the output to settle to within a
1 LSB level for a full-scale input change.
Rev. E
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