參數(shù)資料
型號(hào): AGLE600V5-FFGG484C
元件分類: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA484
封裝: 23 X 23 MM, 2.23 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, FBGA-484
文件頁數(shù): 69/156頁
文件大小: 5023K
代理商: AGLE600V5-FFGG484C
II
v1.2
I/Os Per Package1
IGLOOe Devices
AGLE600
AGLE3000
ARM-Enabled IGLOOe Devices
M1AGLE3000
Package
I/O Types
Single-Ended
I/O1
Differential
I/O Pairs
Single-Ended
I/O1
Differential
I/O Pairs
FG256
165
79
FG484
270
135
341
168
FG896
620
310
Notes:
1. When considering migrating your design to a lower- or higher-density device, refer to the IGLOOe Low-Power Flash
FPGAs with Flash*Freeze Technology handbook to ensure compliance with design and board migration requirements.
2. Each used differential I/O pair reduces the number of single-ended I/Os available by two.
3. For AGLE3000 devices, the usage of certain I/O standards is limited as follows:
– SSTL3(I) and (II): up to 40 I/Os per north or south bank
– LVPECL / GTL+ 3.3 V / GTL 3.3 V: up to 48 I/Os per north or south bank
– SSTL2(I) and (II) / GTL+ 2.5 V/ GTL 2.5 V: up to 72 I/Os per north or south bank
4. FG256 and FG484 are footprint-compatible packages.
5. When using voltage-referenced I/O standards, one I/O pin should be assigned as a voltage-referenced pin (VREF) per
minibank (group of I/Os). When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not as a regular
I/O, the number of single-ended user I/Os available is reduced by one.
6. When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not as a regular I/O, the number of single-
ended user I/Os available is reduced by one.
7. "G" indicates RoHS-compliant packages. Refer to "IGLOOe Ordering Information" on page III for the location of the
"G" in the part number.
IGLOOe FPGAs Package Sizes Dimensions
Package
FG256
FG484
FG896
Length × Width (mm × mm)
17 × 17
23 × 23
31 × 31
Nominal Area (mm2)
289
529
961
Pitch (mm)
11
1
Height (mm)
1.6
2.23
相關(guān)PDF資料
PDF描述
AGLE600V5-FG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V5-FG484C FPGA, 13824 CLBS, 600000 GATES, PBGA484
AGLE600V5-FGG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V5-FGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA484
ACBQ20TTEB270K/390M RC NETWORK, BUSSED, 1W, 27ohm, 20V, 0.000039uF, SURFACE MOUNT, 20
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參數(shù)描述
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