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參數(shù)資料
| 型號： | AGLP125V5-CSG289I |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 3120 CLBS, 125000 GATES, PBGA289 |
| 封裝： | 14 X 14 MM, 1.2 MM HEIGHT, 0.8 MM PITCH, ROHS COMPLIANT, CSP-289 |
| 文件頁數(shù)： | 37/128頁 |
| 文件大?。?/td> | 4383K |
| 代理商： | AGLP125V5-CSG289I |
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IGLOO PLUS DC and Switching Characteristics
2- 2
R ev isio n 1 1
Table 2-2 Recommended Operating Conditions1,2
Symbol
Parameter
Commercial
Industrial
Units
TA
Ambient temperature
0 to +70
–40 to +85
°C
TJ
Junction temperature2
0 to + 85
–40 to +100
°C
VCC3
1.5 V DC core supply voltage 4
1.425 to 1.575
V
1.2 V–1.5 V wide range core voltage5,6
1.14 to 1.575
V
VJTAG
JTAG DC voltage
1.4 to 3.6
V
VPUMP7
Programming voltage
Programming mode
3.15 to 3.45
V
Operation
0 to 3.6
V
VCCPLL8
Analog power supply (PLL)
1.5 V DC core supply voltage4
1.425 to 1.575
V
1.2 V–1.5 V wide range core
voltage5
1.14 to 1.575
V
VCCI
1.2 V DC supply voltage5
1.14 to 1.26
V
1.2 V DC wide range supply voltage5
1.14 to 1.575
V
1.5 V DC supply voltage
1.425 to 1.575
V
1.8 V DC supply voltage
1.7 to 1.9
V
2.5 V DC supply voltage
2.3 to 2.7
V
3.3 V wide range DC supply voltage9
2.7 to 3.6
V
3.3 V DC supply voltage
3.0 to 3.6
V
Notes:
1. All parameters representing voltages are measured with respect to GND unless otherwise specified.
2. To ensure targeted reliability standards are met across ambient and junction operating temperatures, Actel recommends
that the user follow best design practices using Actel’s timing and power simulation tools.
3. The ranges given here are for power supplies only. The recommended input voltage ranges specific to each I/O
standard are given in Table 2-21 on page 2-19. VCCI should be at the same voltage within a given I/O bank.
4. For IGLOO PLUS V5 devices
5. For IGLOO PLUS V2 devices only, operating at VCCI
≥ VCC.
6. All IGLOO PLUS devices (V5 and V2) must be programmed with the VCC core voltage at 1.5 V. Applications using V2
devices powered by a 1.2 V supply must switch the core supply to 1.5 V for in-system programming.
7. VPUMP can be left floating during operation (not programming mode).
8. VCCPLL pins should be tied to VCC pins. See the Pin Descriptions chapter of the IGLOO PLUS FPGA Fabric User’s
Guide for further information.
9. 3.3 V wide range is compliant to the JDEC8b specification and supports 3.0 V VCCI operation.
Table 2-3 Flash Programming Limits – Retention, Storage, and Operating Temperature 1
Product
Grade
Programming
Cycles
Program
Retention
(biased/unbiased)
Maximum Storage
Temperature TSTG
(°C) 2
Maximum Operating
Junction
Temperature TJ (°C)
2
Commercial
500
20 years
110
100
Industrial
500
20 years
110
100
Notes:
1. This is a stress rating only; functional operation at any condition other than those indicated is not implied.
2. These limits apply for program/data retention only. Refer to Table 2-1 on page 2-1 and Table 2-2 for device operating
conditions and absolute limits.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AGLP125V5-CSG289 | FPGA, 3120 CLBS, 125000 GATES, PBGA289 |
| AGLP125V5CS281I | FPGA, 3120 CLBS, 125000 GATES, PBGA281 |
| AGLP125V5CS281 | FPGA, 3120 CLBS, 125000 GATES, PBGA281 |
| AGLP125V5CS289I | FPGA, 3120 CLBS, 125000 GATES, PBGA289 |
| AGLP125V5CS289 | FPGA, 3120 CLBS, 125000 GATES, PBGA289 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AGLP125-V5CSG289PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology |
| AGLP125V5-FCS281 | 制造商:Microsemi Corporation 功能描述:FPGA IGLOO PLUS 125K GATES 1024 CELLS 130NM 1.5V 281CSP - Trays |
| AGLP125-V5FCS289 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology |
| AGLP125V5-FCS289 | 制造商:Microsemi Corporation 功能描述:FPGA IGLOO PLUS 125K GATES 1024 CELLS 130NM 1.5V 289CSP - Trays |
| AGLP125-V5FCS289ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology |
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