參數(shù)資料
型號(hào)： AK4356AVQ
英文描述： D/A CONVERTER
中文描述： D / A轉(zhuǎn)換
文件頁(yè)數(shù)： 19/29頁(yè)
文件大小： 226K
代理商： AK4356AVQ
ASAHI KASEI
[AK4356A]
MS0035-E-00
2000/7
- 19 -
n
Reset Function
When RSTN=0, all DACs are powered down but the internal register values are not initialized. The analog outputs go to
VCOM voltage and DZF pins of all channels go to “H”. Figure 7 shows the sequence of reset by RSTN bit.
Internal
State
RSTN bit
Digital Block Power-down
Normal Operation
GD
GD
“0” data
D/A Out
(Analog)
D/A In
(Digital)
Clock In
MCLK,LRCK,BICK
(1)
(3)
DZFL/DZFR
(3)
(1)
(2)
Normal Operation
2/fs(5)
Internal
RSTN bit
2~3/fs (6)
Don’t care
(4)
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs go to VCOM voltage.
(3) Click noise occurs at the edges(“
↑
↓
”) of the internal timing of RSTN bit. This noise is output even if “0” data
is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the reset mode (RSTN = “L”).
(5) DZF pins go to “H” when the RSTN bit becomes “0”, and go to “L” at 4~5/fs after RSTN bit becomes “1”.
(6) There is a delay, 2~3/fs from RSTN bit “1” to the internal RSTN “1”.
Figure 7. Reset sequence example
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