參數(shù)資料
型號: AK4356AVQ
英文描述: D/A CONVERTER
中文描述: D / A轉(zhuǎn)換
文件頁數(shù): 26/29頁
文件大?。?/td> 226K
代理商: AK4356AVQ
ASAHI KASEI
[AK4356A]
MS0035-E-00
2000/7
- 26 -
Analog Ground
Digital Ground
System
Controller
DVSS
D
12
SDTI1
1
13
SDTI2
14
SDTI3
15
LRCK
16
SMUTE
17
CCLK
18
CDTI
19
CSN
20
DFS0
21
CKS0
22
C
2
44
ROUT1+
AK4356A
2
2
2
2
2
2
3
3
3
3
C
D
D
D
D
D
D
D
V
A
43
ROUT1-
42
LOUT2+
41
LOUT2-
40
ROUT2+
39
ROUT2-
38
LOUT3+
37
LOUT3-
36
ROUT3+
35
ROUT3-
34
AVSS
M
B
9
P
8
C
7
C
6
D
5
D
4
D
3
L
2
L
1
Figure 9. Ground Layout
Note: AVSS and DVSS must be connected to the same analog ground plane.
1. Grounding and Power Supply Decoupling
The AK4356A requires careful attention to power supply and grounding arrangements. AVDD and DVDD are usually
supplied from analog supply in system. Alternatively if AVDD and DVDD are supplied separately, the power up
sequence is not critical.
AVSS and DVSS of the AK4356A must be connected to analog ground plane
. System analog
ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit
board. Decoupling capacitors should be near to the AK4356A as possible, with the small value ceramic capacitors being
the nearest.
2. Voltage Reference Inputs
VREFH sets the analog output range. VREFH pin is normally connected to AVDD with a 0.1
μ
F ceramic capacitor. All
signals, especially clocks, should be kept away from the VREFH pin in order to avoid unwanted coupling into the
AK4356A.
3. Analog Outputs
The analog outputs are full-differential outputs and 0.55 x VREFH Vpp (typ) centered around the internal common
voltage (about AVDD/2). The differential outputs are summed externally, V
AOUT
=(AOUT+)-(AOUT-) between AOUT+
and AOUT-. If the summing gain is 1, the output range is 5.5Vpp (typ @VREFH=5V). The bias voltage of the external
summing circuit is supplied externally. The input data format is 2’s complement. The output voltage(V
AOUT
) is a positive
full scale for 7FFFFF(@24bit) and a negative full scale for 800000H(@24bit). The ideal V
AOUT
is 0V for
000000H(@24bit).
The internal switched-capacitor filter and external low pass filter attenuate the noise generated by the delta-sigma
modulator beyond the audio passband.
DC offset on AOUT+/- is eliminated without AC coupling since the analog outputs are differential. Figure 10 and 11
show the example of external op-amp circuit summing the differential outputs.
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