參數(shù)資料
型號(hào): AK8850
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: NTSC Digital Video Decoder
中文描述: NTSC制式數(shù)字視頻解碼器
文件頁數(shù): 78/99頁
文件大?。?/td> 1757K
代理商: AK8850
ASAHI KASEI
[AK8850]
70
FBCAP2
O
Terminate 0.033uF capacitor between AVSS. (for Clamp Level)
71
FBCAP1
O
Terminate 0.033uF capacitor between AVSS. (for Clamp Level)
72
CLPCAP2
O
Terminate 0.1uF capacitor between AVSS. (for Clamp)
73
CLPCAP1
O
Terminate 0.1uF capacitor between AVSS. (for Clamp)
76
AIN1
I
80
AIN2
I
84
AIN3
I
91
AIN4
I
93
AIN5
I
95
AIN6
I
Analog video signal input pin. The signal should be input through a 0.1uF
capacitor with -6dB Gain.
78
SYNC1
I
82
SYNC2
I
86
SYNC3
I
Analog video signal input pin for the internal clamp pulse generator.
This signal should be input through a 0.1uF capacitor with 0dB Gain.
98
PD
I
Power Down Control Pin. When this pin becomes High, the AK8850 enters a
power down state. When returning from power down mode, AK8850 requires
reset sequence.
56,75,88
AVDD
P
Analog power supply (3.3V) pin.
55,57,74,
77,79,81,
83,85,87,
89,90,92,
94,96,96
AVSS
G
Analog Ground pin.
9,13,17,
21,25,32,
37,42,53
DVDD
P
Digital power supply (3.3V) pin.
5,10,14,
18, 2,33,
38,43,51
DVSS
G
Digital Ground pin.
26,27,28,
29,30,44,
45,46,47,
48
UD[9:0]
I/O
These pins are for test purpose. These pins should be NC.
1,44,45,
46,47,48,
97,99,
100
TEST
I
These pins are for test purpose. Connect to the DVSS.
Rev.0
8
2002/01
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