參數(shù)資料
型號: AM29LV001BB-70ED
廠商: SPANSION LLC
元件分類: PROM
英文描述: Flash Memory IC; Memory Size:1Mbit; Package/Case:48-TSOP; Supply Voltage Max:3V; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes; Access Time, Tacc:70nS; Series:AM29 RoHS Compliant: Yes
中文描述: 128K X 8 FLASH 3V PROM, 70 ns, PDSO32
封裝: LEAD FREE, MO-142BBD, TSOP-32
文件頁數(shù): 37/43頁
文件大?。?/td> 841K
代理商: AM29LV001BB-70ED
40
Am29LV001B
21557F4 May 5, 2006
DATA S H EET
REVISION SUMMARY
Revision A (January 1998)
Initial release. (This revision also represented the
Am29LV010B device.)
Revision A+1 (February 1998)
Logic Symbol
Deleted the BYTE# input from the drawing. (This revi-
sion also represented the Am29LV010B device.)
Revision B (April 1998)
Split the Am29LV001B/Am29LV010B data sheet, with
the elimination of all references to Am29LV010B.
Revision C (April 1998)
Global
Deleted 120 ns speed option; added 90 ns speed
option.
Distinctive Characteristics
Changed process technology to 0.35 m.
Temporary Sector Unprotect
Entered timing specifications for tVIDR and tRSP.
Erase and Programming Performance
Changed endurance in Note 2 to 1 million cycles;
added worst case voltage for -45R speed option.
Revision D (January 1999)
Distinctive Characteristics
Changed process technology to 0.32 m.
DC Characteristics—CMOS Compatible
ICC1, ICC2, ICC3, ICC4, ICC5: Added Note 2 “Maximum
ICC specifications are tested with VCC = VCCmax”.
ICC3, ICC4: Deleted VCC = VCCmax.
Modified second tVIDR parameter.
Data Retention
Added new table.
Revision E (November 17, 1999)
AC Characteristics—Figure 15. Program
Operations Timing and Figure 16. Chip/Sector
Erase Operations
Deleted tGHWL and changed OE# waveform to start at
high.
Physical Dimensions
Replaced figures with more detailed illustrations.
Revision E+1 (November 13, 2000)
Added table of contents. Deleted the burn-in option
from the Ordering Information section.
Revision F (September 26, 2002)
Global
The 45 ns speed option is now available in the indus-
trial temperature range.
Command Definitions
In the introductory paragraph, modified text to indicate
that incorrectly written command sequences may place
the device in an unknown state.
DC Characteristics
Added RESET# input load current specification to
table.
AC Characteristics, Read Operations
Changed tDF to 16 ns for 70 and 90 ns speed options.
Revision F+1 (October 21, 2004)
Global
Added Colophon
Ordering Information
Added temperature ranges for Pb-free package types
Valid Combinations
Added valid combination types
Revision F+2 (July 20, 2005)
Ordering Information
Changed to include Pb-free for PDIP or PLCC
package.
Revision F3 (February 20, 2006)
Global
Removed Reverse TSOP option.
Revision F4 (May 5, 2006)
Global
Added obsolescence information.
相關(guān)PDF資料
PDF描述
AM29LV002BB-120ED Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:2Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:120ns; Series:AM29 RoHS Compliant: Yes
AM29LV002BT-70EF Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:2Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:70ns; Series:AM29 RoHS Compliant: Yes
AM29LV002BT-90ED Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:2Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:90ns; Series:AM29 RoHS Compliant: Yes
AM29LV002BT-90EF Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:2Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:90ns; Series:AM29 RoHS Compliant: Yes
AM29LV004BB-120ED Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:4Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:120ns; Series:AM29 RoHS Compliant: Yes
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