參數(shù)資料
型號： AM29LV800DT-120ED
廠商： ADVANCED MICRO DEVICES INC
元件分類： PROM
英文描述： Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 1800pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: X7R (BX); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: 100% Tin (Sn); Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: P Failure Rate
中文描述： 512K X 16 FLASH 3V PROM, 120 ns, PDSO48
封裝： LEAD FREE, MO-142DD, TSOP-48
文件頁數(shù)： 5/51頁
文件大?。?/td> 1628K
代理商： AM29LV800DT-120ED
January 21, 2005 Am29LV800D_00_A4_E
Am29LV800D
3
P R E L I M I N A R Y
Table Of Contents
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Special Handling Instructions for FBGA Package ..............7
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Standard Products ......................................................................8
Valid Combinations. . . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .10
Table 1. Am29LV800D Device Bus Operations .10
Word/Byte Configuration ......................................................10
Requirements for Reading Array Data ...............................10
Writing Commands/Command Sequences .........................11
Program and Erase Operation Status ...................................11
Standby Mode ..............................................................................11
Automatic Sleep Mode ..............................................................11
RESET#: Hardware Reset Pin .................................................11
Output Disable Mode ...............................................................12
Table 2. Am29LV800DT Top Boot Block
Sector Addresses ........................................12
Table 3. Am29LV800DB Bottom Boot Block
Sector Addresses ........................................13
Autoselect Mode ........................................................................13
Table 4. Am29LV800D Autoselect Codes
(High Voltage Method) ................................14
Sector Protection/Unprotection .......................................... 14
Temporary Sector Unprotect ............................................... 14
Figure 1. Temporary Sector Unprotect
Operation .................................................. 15
Figure 2. In-System Sector Protect/
Sector Unprotect Algorithms ........................ 16
Hardware Data Protection .....................................................17
Command Definitions. . . . . . . . . . . . . . . . . . . . . . 17
Reading Array Data ...................................................................17
Reset Command .........................................................................17
Autoselect Command Sequence ..........................................18
Word/Byte Program Command Sequence .......................18
Figure 1. Program Operation ........................ 19
Chip Erase Command Sequence .......................................... 19
Sector Erase Command Sequence ...................................... 19
Erase Suspend/Erase Resume Commands .......................20
Figure 1. Erase Operation ............................ 21
Table 5. Am29LV800D Command Definitions ..21
Write Operation Status . . . . . . . . . . . . . . . . . . . . 22
DQ7: Data# Polling ..................................................................22
Figure 1. Data# Polling Algorithm ................. 23
RY/BY#: Ready/Busy# .............................................................23
DQ6: Toggle Bit I ......................................................................24
DQ2: Toggle Bit II .....................................................................24
Reading Toggle Bits DQ6/DQ2 ............................................24
DQ5: Exceeded Timing Limits ..............................................25
DQ3: Sector Erase Timer .......................................................25
Figure 1. Toggle Bit Algorithm ...................... 25
Table 6. Write Operation Status ....................26
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 27
Operating Ranges. . . . . . . . . . . . . . . . . . . . . . . . . 27
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .28
CMOS Compatible ..................................................................28
Figure 1. I
CC1
Current vs. Time (Showing Active
and Automatic Sleep Currents) .................... 29
Figure 1. Typical I
CC1
vs. Frequency ............. 29
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Figure 1. Test Setup................................... 30
Table 7. Test Specifications ........................................30
Key to Switching Waveforms. . . . . . . . . . . . . . . . 30
Figure 1. Input Waveforms and
Measurement Levels................................... 30
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 31
Read Operations ........................................................................31
Figure 1. Read Operations Timings............... 31
Hardware Reset (RESET#) ....................................................32
Figure 1. RESET# Timings........................... 32
Word/Byte Configuration (BYTE#) ..................................33
Figure 1. BYTE# Timings for Read
Operations................................................ 34
Figure 1. BYTE# Timings for Write
Operations................................................ 34
Erase/Program Operations ....................................................35
Figure 1. Program Operation Timings............ 36
Figure 1. Chip/Sector Erase Operation
Timings .................................................... 37
Figure 1. Data# Polling Timings (During
Embedded Algorithms) ............................... 38
Figure 1. Toggle Bit Timings (During
Embedded Algorithms) ............................... 38
Figure 1. DQ2 vs. DQ6 ............................... 39
Temporary Sector Unprotect ...............................................39
Figure 1. Temporary Sector Unprotect
Timing Diagram......................................... 39
Figure 1. Sector Protect/Unprotect
Timing Diagram......................................... 40
Alternate CE# Controlled
Erase/Program Operations .................................................... 41
Figure 1. Alternate CE# Controlled Write
Operation Timings...................................... 42
Erase and Programming Performance . . . . . . . . .43
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 43
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 43
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Physical Dimensions* . . . . . . . . . . . . . . . . . . . . . . .44
TS 048—48-Pin Standard TSOP ........................................44
TSR048—48-Pin Reverse TSOP .........................................45
FBB 048—48-Ball Fine-Pitch Ball Grid Array
(FBGA) 6 x 9 mm ...................................................................46
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 47
VBK 048 - 48 Ball Fine-Pitch Ball Grid Array
(FBGA) 6.15 x 8.15 mm .............................................................47
SO 044—44-Pin Small Outline Package ..........................48
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . .49
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