參數(shù)資料
型號： AM29SL400CB100RED
廠商： SPANSION LLC
元件分類： DRAM
英文描述： High Speed CMOS Logic 12-Stage Binary Counter 16-CDIP -55 to 125
中文描述： 256K X 16 FLASH 1.8V PROM, 100 ns, PDSO48
封裝： LEAD FREE, MO-142DD, TSOP-48
文件頁數(shù)： 5/44頁
文件大?。?/td> 945K
代理商： AM29SL400CB100RED
March 3, 2005
3
A d v a n c e I n f o r m a t i o n
Table of Contents
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Special Handling Instructions for FBGA Packages ............6
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9
Table 1. Am29SL400C Device Bus Operations .........................9
Word/Byte Configuration ........................................................9
Requirements for Reading Array Data .................................9
Writing Commands/Command Sequences .......................10
Program and Erase Operation Status .................................10
Standby Mode ............................................................................10
Automatic Sleep Mode ............................................................10
RESET#: Hardware Reset Pin ...............................................10
Output Disable Mode ................................................................11
Table 2. Am29SL400CT Top Boot Block Sector
Address Table ......................................................................................11
Table 3. Am29SL400CB Bottom Boot Block
Sector Address Table ........................................................................11
Autoselect Mode .........................................................................11
Table 4. Am29SL400C Autoselect Codes (High
Voltage Method) .................................................................................12
Sector Protection/Unprotection ...........................................12
Temporary Sector Unprotect ................................................12
Figure 1. In-System Sector Protect/Unprotect Algorithms.... 13
Figure 2. Temporary Sector Unprotect Operation................. 14
Hardware Data Protection .................................................... 14
Command Definitions. . . . . . . . . . . . . . . . . . . . . . 14
Reading Array Data .................................................................. 14
Reset Command ........................................................................ 14
Autoselect Command Sequence ...........................................15
Word/Byte Program Command Sequence ........................15
Figure 3. Program Operation.......................................................... 16
Chip Erase Command Sequence ...........................................16
Sector Erase Command Sequence .......................................16
Figure 4. Erase Operation............................................................... 17
Command Definitions .............................................................18
Table 5. Am29SL400C Command Definitions ..........................18
Write Operation Status ..........................................................18
DQ7: Data# Polling .................................................................. 19
Figure 5. Data# Polling Algorithm................................................. 19
RY/BY#: Ready/Busy# ............................................................. 19
DQ6: Toggle Bit I .....................................................................20
DQ2: Toggle Bit II ....................................................................20
Reading Toggle Bits DQ6/DQ2 ...........................................20
Figure 6. Toggle Bit Algorithm....................................................... 21
DQ5: Exceeded Timing Limits ...............................................21
DQ3: Sector Erase Timer ....................................................... 21
Table 6. Write Operation Status .................................................22
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 22
Figure 7. Maximum Negative Overshoot Waveform............. 22
Figure 8. Maximum Positive Overshoot Waveform.............. 22
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 23
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 9. I
CC1
Current vs. Time (Showing Active and
Automatic Sleep Currents)............................................................ 25
Figure 10. Typical I
CC1
vs. Frequency........................................... 25
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 11. Test Setup......................................................................... 26
Table 7. Test Specifications ............................................................26
Key to Switching Waveforms ...............................................26
Figure 12. Input Waveforms and Measurement Levels.......... 26
Read Operations .......................................................................27
Figure 13. Read Operations Timings............................................ 27
Hardware Reset (RESET#) ...................................................28
Figure 14. RESET# Timings ............................................................. 28
Figure 15. BYTE# Timings for Read Operations...................... 29
Figure 16. BYTE# Timings for Write Operations.................... 29
Erase/Program Operations ...................................................30
Figure 17. Program Operation Timings........................................ 31
Figure 18. Chip/Sector Erase Operation Timings.................... 32
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . .33
Figure 19. Data# Polling Timings (During Embedded
Algorithms)......................................................................................... 33
Figure 20. Toggle Bit Timings (During Embedded
Algorithms)......................................................................................... 33
Figure 21. DQ2 vs. DQ6.................................................................. 34
Temporary Sector Unprotect ...............................................34
Figure 22. Temporary Sector Unprotect Timing
Diagram................................................................................................ 34
Figure 23. Sector Protect/Unprotect Timing Diagram.......... 35
Alternate CE# Controlled Erase/Program
Operations ..................................................................................36
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .37
Figure 24. Alternate CE# Controlled Write Operation
Timings................................................................................................. 37
Erase and Programming Performance . . . . . . . . 38
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 38
TSOP Pin and BGA Package Capacitance . . . . . 38
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . .39
TS048—48-Pin Standard TSOP ............................................39
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . .40
FBA048—48-Ball Fine-Pitch Ball Grid Array
(FBGA) 6 x 8 mm Package ....................................................40
Revision Summary. . . . . . . . . . . . . . . . . . . . . . . . . 41
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