參數(shù)資料
型號: AM41DL6408G55IS
廠商: Advanced Micro Devices, Inc.
英文描述: 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
中文描述: 64兆位(8米× 8位/ 4米x 16位),3.0伏的CMOS只,同時作業(yè)閃存和8兆位(1 M中的x 8-Bit/512畝x 16位),靜態(tài)存儲器
文件頁數(shù): 13/63頁
文件大?。?/td> 573K
代理商: AM41DL6408G55IS
12
Am41DL6408G
August 19, 2002
P R E L I M I N A R Y
Table 3.
Device Bus Operations—Flash Byte Mode, CIOf = V
SS
; SRAM Word Mode, CIOs = V
CC
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 11.5–12.5
V, V
HH
= 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address
Input, Byte Mode, SADD = Flash Sector Address, A
IN
= Address In (for Flash Byte Mode, DQ15 = A-1), D
IN
= Data In, D
OUT
=
Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
IL
, CE1#s = V
IL
and CE2s = V
IH
at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
IL
, the boot sectors will be protected. If WP#/ACC = V
IH
the boot sectors protection will be removed.
If WP#/ACC = V
ACC
(9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
Block Protection and Unprotection” section.
6. If WP#/ACC = V
IL
, the two outermost boot sectors remain protected. If WP#/ACC = V
IH
, the two outermost boot sector protection
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
HH,
all sectors will be unprotected.
Operation
(Notes 1, 2)
CE#f CE1#s CE2s OE#
WE# SA
Addr.
LB#s
(Note 3)
UB#s
(Note 3)RESET#WP#/ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
Read from Flash
L
H
X
L
H
X
A
IN
X
X
H
L/H
D
OUT
High-Z
X
L
Write to Flash
L
H
X
H
L
X
A
IN
X
X
H
(Note 3)
D
IN
High-Z
X
L
Standby
V
CC
±
0.3 V
H
X
X
X
X
X
X
X
V
CC
±
0.3 V
H
High-Z
High-Z
X
L
Output Disable
L
L
H
H
H
X
X
L
X
H
L/H
High-Z
High-Z
X
L
Flash Hardware
Reset
X
H
X
X
X
X
X
X
X
L
L/H
High-Z
High-Z
X
L
Sector Protect
(Note 5)
L
H
X
H
L
X
SADD,
A6 = L,
A1 = H,
A0 = L
X
X
V
ID
L/H
D
IN
X
X
L
Sector
Unprotect
(Note 5)
L
H
X
H
L
X
SADD,
A6 = L,
A1 = H,
A0 = L
X
X
V
ID
(Note 6)
D
IN
X
X
L
Temporary
Sector
Unprotect
X
H
x
X
X
X
A
IN
X
X
V
ID
(Note 6)
D
IN
High-Z
X
L
Read from
SRAM
H
L
H
L
H
X
A
IN
L
L
H
X
D
OUT
High-Z
D
OUT
D
OUT
High-Z
H
L
L
H
D
OUT
D
IN
High-Z
Write to SRAM
H
L
H
X
L
X
A
IN
L
L
H
X
D
IN
D
IN
H
L
L
H
D
IN
High-Z
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