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參數資料
| 型號： | Am70PDL127CDH66IS |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| 中文描述： | 2 × 64兆位（8米× 16位）的CMOS 3.0伏特，只有頁面模式閃存數據存儲128兆位（8米× 16位）的CMOS |
| 文件頁數： | 42/127頁 |
| 文件大?。?/td> | 849K |
| 代理商： | AM70PDL127CDH66IS |
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Am70PDL127CDH/Am70PDL129CDH
November 24, 2003
A D V A N C E I N F O R M A T I O N
Figure 1.
Sector Unprotection Algorithms
In-System Sector Protection/
Sector Protect:
Write 60h to sector
address with
A7-A0 =
00000010
Set up sector
address
Wait 100 μs
Verify Sector
Protect: Write 40h
to sector address
with A7-A0 =
00000010
Read from
sector address
with A7-A0 =
00000010
START
PLSCNT = 1
RESET# = V
ID
Wait 4
μ
s
First Write
Cycle = 60h
Data = 01h
Remove V
from RESET#
Write reset
command
Sector Protect
complete
Yes
Yes
No
PLSCNT
= 25
Yes
Device failed
Increment
PLSCNT
Temporary Sector
Unprotect Mode
No
Sector Unprotect:
Write 60h to sector
address with
A7-A0 =
01000010
Set up first sector
address
Wait 1.2 ms
Verify Sector
Unprotect: Write
40h to sector
address with
A7-A0 =
00000010
Read from
sector address
with A7-A0 =
00000010
START
PLSCNT = 1
RESET# = V
ID
Wait 4
μ
s
Data = 00h
Last sector
verified
Remove V
from RESET#
Write reset
command
Sector Unprotect
complete
Yes
No
PLSCNT
= 1000
Yes
Device failed
Increment
PLSCNT
Temporary Sector
Unprotect Mode
No
All sectors
protected
Yes
Protect all sectors:
The indicated portion
of the sector protect
algorithm must be
performed for all
unprotected sectors
prior to issuing the
first sector
unprotect address
Set up
next sector
address
No
Yes
No
Yes
No
No
Yes
No
Sector Protect
Algorithm
Sector Unprotect
Algorithm
First Write
Cycle = 60h
Protect another
sector
Reset
PLSCNT = 1
Remove V
from RESET#
Write reset
command
Sector Protect
complete
Remove V
from RESET#
Write reset
command
Sector Unprotect
complete
相關PDF資料 |
PDF描述 |
|---|---|
| Am70PDL127CDH66IT | 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| Am70PDL127CDH85IS | 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| Am70PDL127CDH85IT | 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| Am70PDL129CDH | 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
| Am70PDL129CDH66IS | 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AM70PDL127CDH66IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP) |
| AM70PDL127CDH85I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP) |
| AM70PDL127CDH85IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP) |
| AM70PDL127CDH85IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP) |
| AM70PDL129BDH | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS |
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