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參數(shù)資料
| 型號(hào)： | AM79C960KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnetTM-ISA Single-Chip Ethernet Controller |
| 中文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP120 |
| 封裝： | PLASTIC, QFP-120 |
| 文件頁數(shù)： | 30/127頁 |
| 文件大?。?/td> | 814K |
| 代理商： | AM79C960KCW |
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P R E L I M I N A R Y
AMD
1-372
Am79C960
FUNCTIONAL DESCRIPTION
The PCnet-ISA controller is a highly integrated system
solution for the PC-AT ISA architecture. It provides an
Ethernet controller, AUI port, and 10BASE-T trans-
ceiver. The PCnet-ISA controller can be directly
interfaced to an ISA system bus. The PCnet-ISA con-
troller contains an ISA bus interface unit, DMA Buffer
Management Unit, 802.3 Media Access Control func-
tion, separate 136-byte transmit and 128-byte receive
FIFOs, IEEE defined Attachment Unit Interface (AUI),
and Twisted-Pair Transceiver Media Attachment Unit.
In addition, a Sleep function has been incorporated
which provides low standby current for power sensitive
applications.
The PCnet-ISA controller is register compatible with the
LANCE (Am7990) Ethernet controller and PCnet-ISA
+
controller (Am79C961). The DMA Buffer Management
Unit supports the LANCE descriptor software model and
the PCnet-ISA controller is software compatible with the
Novell NE2100 and NE1500T add-in cards.
External remote boot and Ethernet physical address
PROMs are supported. The location of the I/O registers
and PROMs are configured by selected pins and inter-
nal address comparators (in bus master mode) or
external logic (in shared memory mode).
The PCnet-ISA controller’s bus master architecture
brings to system manufacturers (adapter card and
motherboard makers alike) something they have not
been able to enjoy with other architectures—a low-cost
system solution that provides the lowest parts count and
highest performance. As a bus-mastering device, costly
and power-hungry external SRAMs are not needed for
packet buffering. This results in lower system cost due
to fewer components, less real-estate and less power.
The PCnet-ISA controller’s advanced bus mastering ar-
chitecture also provides high data throughput and low
CPU utilization for even better performance.
To offer greater flexibility, the PCnet-ISA controller has
a shared memory mode to meet varying application
needs. The shared memory architecture is compatible
with very low-end machines, such as PC/XTs that do not
support bus mastering, and very high end machines
which require local packet buffering for increased sys-
tem latency.
The network interface provides an Attachment Unit In-
terface and Twisted-Pair Transceiver functions. Only
one interface is active at any particular time. The AUI
allows for connection via isolation transformer to
10BASE5 and 10BASE2, thick and thin based coaxial
cables. The Twisted-Pair Transceiver interface allows
for connection of unshielded twisted-pair cables as
specified by the Section 14 supplement to IEEE 802.3
Standard (Type 10BASE-T).
Bus Master Mode
System Interface
The PCnet-ISA controller has two fundamental operat-
ing modes, Bus Master and Shared Memory. The
selection of either the Bus Master mode or the Shared
Memory mode must be done through hard wiring; it is
not software configurable. The Bus Master mode pro-
vides an Am7990 (LANCE) compatible Ethernet
controller, an Ethernet Address PROM, a Boot PROM,
and a set of device configuration registers.
The optional Boot PROM is in memory address space
and is expected to be 16 kilobytes or less in size. The
memory address is always related to the I/O address.
For example, 0x300 is always associated with 0xC8000.
On-chip address comparators control device selection
based on the value of the input pins IOAM0 and IOAM1.
The
SMEMR
input pin can be left unconnected for appli-
cations where a Remote Boot PROM is not needed.
The address PROM, board configuration registers, and
the Ethernet controller occupy 24 bytes of I/O space and
can be located on four different starting addresses.
Data buffers are located in motherboard memory and
can be accessed by the PCnet-ISA controller when the
device becomes the Current Master.
ISA
Bus
16-Bit System Data
24-Bit System
Address
PCnet-ISA
Controller
SA0–19
LA17–23
8-Bit Private Data
Ethernet
Address
PROM
Boot
PROM
16907B-5
CS
A0–X
CS
A0–X
SD0–15
PRDB0–7
APCS
BPCS
D0–7
D0–7
Bus Master Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C961AKCW | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKC | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961A | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKIW | PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AVCW | PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C961 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C961 - PCnet-ISA+ Jumperless Single-Chip Ethernet Controller for ISA |
| AM79C961/AM79C961A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Using the Am79C961/Am79C961A (PCnet-ISA+/PCnet-ISA II) Survival Guide? 134KB (PDF) |
| AM79C961A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
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