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參數(shù)資料
| 型號： | AM79C976 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| 中文描述： | PCnet -專業(yè)⑩個10/100Mbps PCI以太網(wǎng)控制器 |
| 文件頁數(shù)： | 67/309頁 |
| 文件大?。?/td> | 2070K |
| 代理商： | AM79C976 |
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8/01/00
Am79C976
67
P R E L I M I N A R Y
The receiver section of the MAC engine will detect the
incoming preamble sequence when the RX_DV signal
is activated by the external PHY. The MAC will discard
the preamble and begin searching for the SFD except
in the case of 100BASE-T4, for which there is no pre-
amble. In that case, the SFD will be the first two nibbles
received. Once the SFD is detected, all subsequent
nibbles are treated as part of the frame. The MAC en-
gine will inspect the length field to ensure minimum
frame size, strip unnecessary pad characters (if auto-
matic pad stripping is enabled), and pass the remaining
bytes through the receive FIFO to the host. If pad strip-
ping is performed, the MAC engine will also strip the re-
ceived FCS bytes, although normal FCS computation
and checking will occur. Note that apart from pad strip-
ping, the frame will be passed unmodified to the host.
If the length field has a value of 46 or greater, all frame
bytes including FCS will be passed unmodified to the
receive buffer, regardless of the actual frame length.
If the frame terminates or suffers a collision before 64
bytes of information (after SFD) have been received,
the MAC engine will automatically delete the frame
from the receive FIFO, without host intervention. The
Am79C976 controller has the ability to accept runt
packets for diagnostic purposes and proprietary net-
works.
*.
The first 6 bytes of information after SFD will be inter-
preted as the destination address field. The MAC en-
gine provides facilities for physical (unicast), logical
(multicast), and broadcast address reception.
!
The MAC engine provides several facilities which count
and recover from errors on the medium. In addition, it
protects the network from gross errors due to inability
of the host to keep pace with the MAC engine activity.
On completion of transmission, the MAC engine up-
dates various counters that are described in the Statis-
tics Counters section. The host CPU can read these
counters at any time for network management pur-
poses.
The MAC engine also attempts to prevent the creation
of any network error due to the inability of the host to
service the MAC engine. During transmission, if the
host fails to keep the transmit FIFO filled sufficiently,
causing an underflow, the MAC engine will guarantee
the message is sent with an invalid FCS, which will
cause the receiver to reject the message.
The MAC engine can be programmed to try to transmit
the same frame again after a FIFO underflow or exces-
sive collision error.
The status of each receive message is available in the
appropriate Receive Message Descriptor (RMD). All
received frames are passed to the host regardless of
any error.
During the reception, the FCS is generated on every
nibble (including the dribbling bits) coming from the MII,
although the internally saved FCS value is only up-
dated on each byte boundary. The MAC engine will ig-
nore an extra nibble at the end of a message, which
corresponds to dribbling bits on the network medium. A
framing or alignment error is reported to the user if an
FCS error is detected and there is an extra nibble in the
message. If there is an extra nibble but no FCS error,
no framing error is reported.
#((#!
The basic requirement for all stations on the network is
to provide fairness of channel allocation. The IEEE
802.3/Ethernet protocols define a media access mech-
anism which permits all stations to access the channel
with equality. Any node can attempt to contend for the
channel by waiting for a predetermined time (Inter
Packet Gap) after the last activity, before transmitting
on the media. The channel is a multidrop communica-
tions media (with various topological configurations
permitted), which allows a single station to transmit and
all other stations to receive. If two nodes simulta-
neously contend for the channel, their signals will inter-
act causing loss of data, defined as a collision. It is the
responsibility of the MAC to attempt to avoid and to re-
cover from collisions.
"##
The IEEE/ANSI 802.3 standard (ISO/IEC 8802-3 1990)
requires that the CSMA/CD MAC monitor the medium
for traffic by watching for carrier activity. When carrier is
detected, the media is considered busy, and the MAC
should defer to the existing message.
The ISO 8802-3 (IEEE/ANSI 802.3) standard allows an
optional two-part deferral after a receive message.
See ANSI/IEEE Std 802.3-1993 Edition, 4.2.3.2.1:
Note:
It is possible for the PLS carrier sense indication
to fail to be asserted during a collision on the media. If
the deference process simply times the inter-Frame
gap based on this indication, it is possible for a short in-
terFrame gap to be generated, leading to a potential re-
ception failure of a subsequent frame. To enhance
system robustness, the following optional measures,
as specified in 4.2.8, are recommended when Inter-
Frame-SpacingPart1 is other than 0:
1. Upon completing a transmission, start timing the in-
terrupted gap, as soon as transmitting and carrier
sense are both false.
2. When timing an inter-frame gap following reception,
reset the inter-frame gap timing if carrier sense be-
comes true during the first 2/3 of the inter-frame gap
timing interval. During the final 1/3 of the interval,
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C976KIW | PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| AM79C976KCW | PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| AM79C978AKCW | Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978AVCW | Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978 | Single-Chip 1/10 Mbps PCI Home Networking Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C976KC | 制造商:Rochester Electronics LLC 功能描述:METRIC PLASTIC QUAD-RING - Bulk |
| AM79C976KCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| AM79C976KD | 制造商:Advanced Micro Devices 功能描述:ETHERNET:MEDIA ACCESS CONTROLLER (MAC) |
| AM79C976KF | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP 制造商:AMD (Advanced Micro Devices) 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP |
| AM79C976KI | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP 制造商:AMD (Advanced Micro Devices) 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP |
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