參數(shù)資料
型號(hào): AS8510-ASST-500
廠商: ams
文件頁(yè)數(shù): 22/47頁(yè)
文件大?。?/td> 0K
描述: IC BATTERY MANAGEMENT 20-SSOP
產(chǎn)品培訓(xùn)模塊: AS8510 Data Acquisition IC
標(biāo)準(zhǔn)包裝: 1
類型: 電池管理
輸入類型: 模擬,數(shù)字
輸出類型: 模擬,數(shù)字
接口: SPI 串行
電流 - 電源: 5.5mA
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 20-SSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AS8510-ASST-500DKR
Revision 3.5
28 - 46
AS8510
Datasheet - Detailed Descr i p ti on
Digital Signal Path Control Registers for Current Channel
05
DEC_REG_R1_I
0100_ 0101
R/W
D[7]
This bit selects decimation rate is used for current
channel. Default is 0 (Down Sampling Rate is 64)
0
Down Sampling Rate is 64
1
Down Sampling Rate is 128
D[6:5]
These two bits select division ratio of oversampling
frequency clock MOD_CLK to be used as chopper
clock, CHOP_CLK.
Default is “10” (divide by 512)
00
Chopper Clock Always High
01
Divide by 256
10
Divide by 512
11
Divide by 1024
D[4:1]
These four bits select the decimation ratio of second
CIC stage. Default is “0010” (equal to 4)
0000
1
0001
2
0010
4
0011
8
0100
16
0101
32
0110
64
0111
128
1000
256
1001
512
1010
1024
1011
2048
1100
4096
1101
8192
1110
16384
1111
32768
D[0]
CIC1 Saturation Interrupt Mask Control.
Default is 1
0Unmask
1Mask
Table 33. Control Registers
Addr in
HEX
Register Name
POR Value
R/W
8-bit Control / Status Data
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