參數(shù)資料
型號: AT30TS750-MA8-T
廠商: ATMEL CORP
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 3Cel, RECTANGULAR, SURFACE MOUNT
封裝: 2 X 3 MM, 0.60 MM HEIGHT, GREEN, PLASTIC, MO-229, UDFN-8
文件頁數(shù): 14/52頁
文件大?。?/td> 1369K
代理商: AT30TS750-MA8-T
Atmel AT30TS750 [Preliminary]
device will still respond with an ACK to indicate that it received the proper data byte even though
the contents of the Configuration Register will not be changed.
6.3.1
OS Bit
The OS bit is used to enable the One-Shot temperature measurement mode. When a logic “1” is
written to the OS bit while the AT30TS750 is in the Shutdown Mode, the device will become
active and perform a single temperature measurement and conversion. After the Temperature
Register has been updated with the measured temperature data, the device will return to the low-
power Shutdown Mode and clear the OS bit.
Writing a “1” to the OS bit when the device is not in the Shutdown Mode will have no affect.
When reading the Configuration Register, the OS bit will always be read as a logic “0”.
6.3.2
R1: R0 Bits
The R1 and R0 bits are used to select the conversion resolution of the internal sigma-delta ADC.
Four possible resolutions can be set to maximize for either higher resolution or faster conversion
times.
The R1 and R0 bits will be copied from the NVR1 and NVR0 in the Nonvolatile
Configuration Register after device power-up or reset, allowing the device to retain the conversion
resolution that was previously set by the Nonvolatile Configuration Register prior to power-down
or reset.
Table 6-6.
Conversion Resolution
R1
R0
Conversion Resolution
Conversion Time
0
9 bits
0.5°C
25 ms
0
1
10 bits
0.25°C
50 ms
1
0
11 bits
0.125°C
100 ms
1
12 bits
0.0625°C
200 ms
6.3.3
FT1:FT0 Bits
The FT1 and FT0 bits are used to set the Fault Tolerance Queue value which defines how many
consecutive faults must occur before the ALERT pin will be activated (see Fault Tolerance Limits
section on page 9). The FT1 and FT0 bit settings provide four different fault values as detailed in
Table 6-7. After the device powers up or resets, the FT1 and FT0 bits will be copied from the
NVFT1 and NVFT0 in the Nonvolatile Configuration Register; therefore, the Fault Tolerance
Queue value will default to whatever value was previously stored in the Nonvolatile Configuration
Register prior to power-down or reset.
8749A-DTS-03/11
21
R
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