參數(shù)資料
型號(hào): AT30TS750-MA8-T
廠商: ATMEL CORP
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 3Cel, RECTANGULAR, SURFACE MOUNT
封裝: 2 X 3 MM, 0.60 MM HEIGHT, GREEN, PLASTIC, MO-229, UDFN-8
文件頁數(shù): 15/52頁
文件大?。?/td> 1369K
代理商: AT30TS750-MA8-T
R
Table 6-7.
Fault Tolerance Queue
FT1
FT0
Consecutive Faults Required
0
1
0
1
2
1
0
4
1
6
6.3.4
POL Bit
The ALERT pin polarity is controlled by the POL bit. When the POL bit is in the logic “0” state,
the ALERT pin will be an active low output. To configure the ALERT pin as an active high output,
the POL bit must be set to the logic “1” state.
After the device powers up or resets, the POL bit will be copied from the NVPOL bit in the
Nonvolatile Configuration Register; therefore, the polarity of the ALERT pin will default to the
state defined by the Nonvolatile Configuration Register prior to power-down or reset.
6.3.5
CMP/INT Bit
The CMP/INT bit controls whether the device will operate in the Comparator Mode or the Interrupt
Mode. Setting the CMP/INT bit to the logic “0” state will put the device into the Comparator Mode.
Alternatively, when the CMP/INT bit is set to the logic “1” state, then the device will operate in the
Interrupt Mode. The function of the ALERT pin changes based on the CMP/INT bit setting.
The CMP/INT bit will be copied from the NVCMP/INT bit in the Nonvolatile Configuration Register
after the device powers up or resets. Since the CMP/INT bit is copied from the NVCMP/INT bit,
the device will default to whatever mode was selected by the Nonvolatile Configuration Register
prior to power-down or reset.
6.3.6
SD Bit
The SD bit is used to enable or disable the device’s Shutdown Mode. When the SD bit is in the
logic “0” state, the device will be in the normal operational mode and perform continuous
temperature measurements and conversions. When the SD bit is set to the logic “1” state, the
device will finish the current temperature measurement and conversion and will store the result in
the Temperature Register, after which the device will then enter the Shutdown Mode.
Resetting the SD bit back to a logic “0” will return the device to the normal operating mode.
After the device powers up or resets, the SD bit will be copied from the NVSD bit in the
Nonvolatile Configuration Register. Therefore, it is possible for the device to automatically enter
the Shutdown Mode after power-up or reset by setting the NVSD bit to the logic “1” state prior to
power-down or reset. See the Shutdown Mode section on page 13 for more details.
6.3.7
NVRBSY
The ready/busy status of the Nonvolatile Configuration Register, Nonvolatile TLOW Limit Register,
and Nonvolatile THIGH Limit Register can be determined by reading the NVRBSY bit. When the
NVRBSY bit is in the logic “0” state, then the nonvolatile configuration and limit registers are
available to be read from or written to.
When the NVRBSY bit is in the logic “1” state, the
nonvolatile registers are busy and cannot be accessed for reading, writing, or copying.
Attempting to read the nonvolatile registers while the registers are busy will result in erroneous
8749A-DTS-03/11
Atmel AT30TS750 [Preliminary]
22
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相關(guān)代理商/技術(shù)參數(shù)
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AT30TS750SS8T 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:9- to 12-bit Selectable, ?±0.5?°C Accurate Digital Temperature Sensor with Nonvolatile Registers
AT30TS750-SS8-T 功能描述:板上安裝溫度傳感器 TMP SENSOR RoHS:否 制造商:Omron Electronics 輸出類型:Digital 配置: 準(zhǔn)確性:+/- 1.5 C, +/- 3 C 溫度閾值: 數(shù)字輸出 - 總線接口:2-Wire, I2C, SMBus 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 最大工作溫度:+ 50 C 最小工作溫度:0 C 關(guān)閉: 安裝風(fēng)格: 封裝 / 箱體: 設(shè)備功能:Temperature and Humidity Sensor
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