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參數(shù)資料
| 型號： | AT40K40LV-3BGC |
| 廠商： | ATMEL CORP |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 2304 CLBS, 40000 GATES, PBGA352 |
| 封裝： | BGA-352 |
| 文件頁數(shù)： | 12/67頁 |
| 文件大?。?/td> | 1589K |
| 代理商： | AT40K40LV-3BGC |
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2
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
Note:
1. Packages with FCK will have 8 less registers.
Description
The AT40K/AT40KLV is a family of fully PCI-compliant, SRAM-based FPGAs with dis-
tributed 10 ns programmable synchronous/asynchronous, dual-port/single-port SRAM,
8 global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data),
automatic component generators, and range in size from 5,000 to 50,000 usable gates.
I/O counts range from 128 to 384 in industry standard packages ranging from 84-pin
PLCC to 352-ball Square BGA, and support 5V designs for AT40K and 3.3V designs for
AT40KLV.
The AT40K/AT40KLV is designed to quickly implement high-performance, large gate
count designs through the use of synthesis and schematic-based tools used on a PC or
Sun platform. Atmel’s design tools provide seamless integration with industry standard
tools such as Synplicity, ModelSim, Exemplar and Viewlogic.
The AT40K/AT40KLV can be used as a coprocessor for high-speed (DSP/processor-
based) designs by implementing a variety of computation intensive, arithmetic functions.
These include adaptive finite impulse response (FIR) filters, fast Fourier transforms
(FFT), convolvers, interpolators and discrete-cosine transforms (DCT) that are required
for video compression and decompression, encryption, convolution and other multime-
dia applications.
Fast, Flexible and
Efficient SRAM
The AT40K/AT40KLV FPGA offers a patented distributed 10 ns SRAM capability where
the RAM can be used without losing logic resources. Multiple independent, synchronous
or asynchronous, dual-port or single-port RAM functions (FIFO, scratch pad, etc.) can
be created using Atmel’s macro generator tool.
Fast, Efficient Array and
Vector Multipliers
The AT40K/AT40KLV’s patented 8-sided core cell with direct horizontal, vertical and
diagonal cell-to-cell connections implements ultra fast array multipliers without using
any busing resources. The AT40K/AT40KLV’s Cache Logic capability enables a large
number of design coefficients and variables to be implemented in a very small amount
of silicon, enabling vast improvement in system speed at much lower cost than conven-
tional FPGAs.
Table 1. AT40K/AT40KLV Family
Device
AT40K05
AT40K05LV
AT40K10
AT40K10LV
AT40K20
AT40K20LV
AT40K40
AT40K40LV
Usable Gates
5K - 10K
10K - 20K
20K - 30K
40K - 50K
Rows x Columns
16 x 16
24 x 24
32 x 32
48 x 48
Cells
256
576
1,024
2,304
Registers
576
1,024
2,304
RAM Bits
2,048
4,608
8,192
18,432
I/O (Maximum)
128
192
256
384
相關(guān)PDF資料 |
PDF描述 |
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| AT40K40LV-3BQC | FPGA, 2304 CLBS, 40000 GATES, PQFP144 |
| AT40K40LV-3DQC | FPGA, 2304 CLBS, 40000 GATES, PQFP208 |
| AT40K40LV-3EQC | FPGA, 2304 CLBS, 40000 GATES, PQFP240 |
| AT40K40LV-3FQC | FPGA, 2304 CLBS, 40000 GATES, PQFP304 |
| AT40KEL040KW1SB | FPGA, 2304 CLBS, 50000 GATES, PQFP160 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT40K40LV-3BGI | 功能描述:IC FPGA 3.3V 2304 CELL 352BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:AT40K/KLV 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| AT40K40LV-3BQC | 功能描述:IC FPGA 3.3V 2304 CELL 144-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:AT40K/KLV 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| AT40K40LV-3BQI | 功能描述:IC FPGA 3.3V 2304 CELL 144TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:AT40K/KLV 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| AT40K40LV-3CGC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| AT40K40LV-3CQC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
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