參數(shù)資料
型號(hào): AT42QT1110-MZ
廠商: ATMEL CORP
元件分類: 速度傳感器和接近開(kāi)關(guān)
英文描述: PROXIMITY SENSOR-CAPACITIVE, 0-5V, SQUARE, SURFACE MOUNT
封裝: 5 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-220VHHD-2, QFN-32
文件頁(yè)數(shù): 25/46頁(yè)
文件大小: 657K
代理商: AT42QT1110-MZ
33
4519 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Fig. 25 Timer structure (1)
System clock (STCK)
Instruction clock
(INSTCK)
Multi-
plexer
(CMCK,
CRCK,
CYCK)
(Note 1)
MR0
1
0
ORCLK
Reload register RPS (8)
Prescaler (8)
Register B
Register A
(TABPS)
(TPSAB)
PA0
MR3, MR2
01
00
10
11
INSTCK
W11, W10 (Note 3)
10
11
01
00
ORCLK
XIN
T1F
(TAB1)
(T1AB)
(TPSAB)
Ring oscillator
XIN
Ceramic resonance
RC oscillation
Timer 1 (8)
Timer 1
interrupt
Reload register R1 (8)
Register B Register A
Timer 1 underflow signal (
T1UDF)
Internal clock
generating circuit
(divided by 3)
Quartz-crystal
oscillation
W12
STCK
W21, W20
10
11
01
00
ORCLK
T1UDF
PWMOUT
T2F
(TAB2)
(T2AB)
Timer 2
interrupt
Timer 2 underflow signal (T2UDF)
Timer 2 (8)
Reload register R2 (8)
Register B Register A
W22
0
1
W52
0
1
I12
0
1
P30/INT0
W13
T1UDF
I10
I13
I11
One-sided edge
detection circuit
Both edges
detection circuit
0
1
I10
S
R
Q
W51, W50
10
11
01
00
W52
One-period
generation circuit
1/16
Ring oscillator
0
1
W62
D6/CNTR0
0
1
W60
Port D6 output
0
1
W23
1/2
T1UDF
1/2
T2UDF
(Note 2)
(TR1AB)
TR1AB:
PWMOUT:
This instruction is used to transfer the contents of
register A and register B to only reload register R1.
PWM output signal (from timer 4 output unit)
Data is set automatically from each reload
register when timer underflows
(auto-reload function).
Notes 1: When CMCK instruction is executed, ceramic resonance is selected.
When CRCK instruction is executed, RC oscillation is selected.
When CYCK instruction is executed, quartz-crystal oscillator is selected.
2: Timer 1 count start synchronous circuit is set by the valid edge of P30/INT0 pin
selected by bits 1 (I11) and 2 (I12) of register I1.
3: XIN cannot be used for the count source when bit 1 (MR1) of register MR is set
to “1” and f(XIN) oscillation is stopped.
0
1
W52
Divided by 4
Divided by 2
Divided by 8
Division circuit
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