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參數(shù)資料
| 型號(hào)： | AT49BV8004-90TC |
| 廠商： | ATMEL CORP |
| 元件分類： | PROM |
| 英文描述： | 1M X 8 FLASH 3V PROM, 90 ns, PDSO48 |
| 封裝： | PLASTIC, TSOP 1-48 |
| 文件頁數(shù)： | 17/21頁 |
| 文件大?。?/td> | 415K |
| 代理商： | AT49BV8004-90TC |
AT49BV8011(T)/8004(T)
5
grammer to identify the correct programming algorithm for
the Atmel product.
For details, see Operating Modes (for hardware operation)
or Software Product Identification. The manufacturer and
device code is the same for both modes.
DATA POLLING: The AT49BV80XX(T) features DATA
polling to indicate the end of a program cycle. During a pro-
gram cycle an attempted read of the last byte/word loaded
will result in the complement of the loaded data on I/O7.
Once the program cycle has been completed, true data is
valid on all outputs and the next cycle may begin. During a
chip or sector erase operation, an attempt to read the
device will give a “0” on I/O7. Once the program or erase
cycle has completed, true data will be read from the device.
DATA polling may begin at any time during the program
cycle. Please see “Status Bit Table” for more details.
TOG G LE B I T : I n add ition to D A T A p o llin g the
AT49BV80XX(T) provides another method for determining
the end of a program or erase cycle. During a program or
erase operation, successive attempts to read data from the
same memory plane will result in I/O6 toggling between
one and zero. Once the program cycle has completed, I/O6
will stop toggling and valid data will be read. Examining the
toggle bit may begin at any time during a program cycle.
An additional toggle bit is available on I/O2 which can be
used in conjunction with the toggle bit which is available on
I/O6. While a sector is erase suspended, a read or a pro-
gram operation from the suspended sector will result in the
I/O2 bit toggling. Please see “Status Bit Table” for more
details.
RDY/BUSY: An open drain READY/BUSY output pin pro-
vides another method of detecting the end of a program or
erase operation. RDY/BUSY is actively pulled low during
the internal program and erase cycles and is released at
the completion of the cycle. The open drain connection
allows for OR-tying of several devices to the same
RDY/BUSY line.
HARDWARE DATA PROTECTION: Hardware features
pr ot ect ag ainst ina d ver t e n t pr og r a ms t o the
AT49BV80XX(T) in the following ways: (a) V
CC sense: if
V
CC is below 1.8V (typical), the program function is inhib-
ited. (b) VCC power on delay: once VCC has reached the
VCC sense level, the device will automatically time out 10
ms (typical) before programming. (c) Program inhibit: hold-
ing any one of OE low, CE high or WE high inhibits
program cycles. (d) Noise filter: pulses of less than 15 ns
(typical) on the WE or CE inputs will not initiate a program
cycle.
INPUT LEVELS: While operating with a 2.7V to 3.6V
power supply, the address inputs and control inputs (OE,
CE, and WE) may be driven from 0 to 5.5V without
adversely affecting the operation of the device. The I/O
lines can only be driven from 0 to VCC + 0.6V.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT49BV8011 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-megabit (512K x 16/1M x 8) 3-volt Only Flash Memory |
| AT49BV8011-11CI | 功能描述:IC FLASH 8MBIT 110NS 48CBGA 制造商:microchip technology 系列:- 包裝:托盤 零件狀態(tài):停產(chǎn) 存儲(chǔ)器類型:非易失 存儲(chǔ)器格式:閃存 技術(shù):FLASH 存儲(chǔ)容量:8Mb （1M x 8，512K x 16） 寫周期時(shí)間 - 字，頁:50μs 訪問時(shí)間:110ns 存儲(chǔ)器接口:并聯(lián) 電壓 - 電源:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C（TC） 安裝類型:表面貼裝 封裝/外殼:48-VFBGA，CSBGA 供應(yīng)商器件封裝:48-CBGA（6x8） 基本零件編號(hào):AT49BV8011 標(biāo)準(zhǔn)包裝:360 |
| AT49BV8011-12CC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM |
| AT49BV8011-12CI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM |
| AT49BV8011-12TC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-megabit (512K x 16/1M x 8) 3-volt Only Flash Memory |
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