參數(shù)資料
型號(hào): AT89LP51-20MU
廠商: Atmel
文件頁數(shù): 59/117頁
文件大?。?/td> 0K
描述: MCU 8051 4K FLASH 20MHZ 7X7MLF
標(biāo)準(zhǔn)包裝: 360
系列: 89LP
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VFQFN 裸露焊盤
包裝: 托盤
46
3709D–MICRO–12/11
AT89LP51/52
11. Timer 0 and Timer 1
The AT89LP51/52 has two 16-bit Timer/Counters, Timer 0 and Timer 1, with the following
features:
Two independent 16-bit timer/counters with 8-bit reload registers
UART baud rate generation using Timer 1
Output pin toggle on timer overflow
Split timer mode allows for three separate timers (2 8-bit, 1 16-bit)
Gated modes allow timers to run/halt based on an external input
Timer 0 and Timer 1 have similar modes of operation. As timers, the timer registers normally
increase every clock cycle. Thus, the registers count clock cycles. The timer rate can be pres-
caled by a value between 1 and 16 using the Timer Prescaler (see Table 6-2 on page 31). Both
Timers share the same prescaler. In Compatibility mode CDV defaults to 2, so a clock cycle con-
sists of two oscillator periods,and the prescaler defaults to 6 making the count rate equal to 1/12
of the oscillator frequency. By default in Fast mode CDV = 0 and TPS =0 so the count rate is
equal to the oscillator frequency.
As counters, the timer registers are incremented in response to a 1-to-0 transition at the corre-
sponding input pins, T0 or T1. In Fast mode the external input is sampled every clock cycle.
When the samples show a high in one cycle and a low in the next cycle, the count is incre-
mented. The new count value appears in the register during the cycle following the one in which
the transition was detected. Since 2 clock cycles are required to recognize a 1-to-0 transition,
the maximum count rate is 1/2 of the system frequency. There are no restrictions on the duty
cycle of the input signal, but it should be held for at least one full clock cycle to ensure that a
given level is sampled at least once before it changes.
In Compatibility mode the counter input sampling is controlled by the prescaler. Since TPS
defaults to 6 in this mode, the pins are sampled every six system clocks. Therefore the input sig-
nal should be held for at least six clock cycles to ensure that a given level is sampled at least
once before it changes.
Furthermore, the Timer or Counter functions for Timer 0 and Timer 1 have four operating modes:
13-bit timer, 16-bit timer, 8-bit auto-reload timer, and split timer. The control bits C/T in the Spe-
cial Function Register TMOD select the Timer or Counter function. The bit pairs (M1, M0) in
TMOD select the operating modes.
Table 11-1.
Timer 0/1 Register Summary
Name
Address
Purpose
Bit-Addressable
TCON
88H
Control
Y
TMOD
89H
Mode
N
TL0
8AH
Timer 0 low-byte
N
TL1
8BH
Timer 1 low-byte
N
TH0
8CH
Timer 0 high-byte
N
TH1
8DH
Timer 1 high-byte
N
TCONB
91H
Mode
N
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AT89LP51ED2-20AAU 功能描述:8位微控制器 -MCU 64KB 20MHz 2.4V-5.5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
AT89LP51ED2-20AU 功能描述:8位微控制器 -MCU 64KB 20MHz 2.4V-5.5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
AT89LP51ED2-20JU 功能描述:8位微控制器 -MCU 64KB 20MHz 2.4V-5.5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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