參數(shù)資料
型號: AT90USB647-AU
廠商: Atmel
文件頁數(shù): 76/106頁
文件大?。?/td> 0K
描述: IC AVR MCU 64K 64TQFP
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 450
系列: AVR®
應(yīng)用: USB 微控制器
核心處理器: AVR
程序存儲器類型: 閃存(64 kB)
控制器系列: AT90 USB
RAM 容量: 4K x 8
接口: 2 線串行,SPI 串行,USART,USB
輸入/輸出數(shù): 48
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP,64-VQFP
包裝: 托盤
供應(yīng)商設(shè)備封裝: 64-TQFP
配用: ATSTK600-RC17-ND - STK600 ROUTING CARD AVR
ATSTK525-ND - KIT STARTER FOR AT90USB
AT90USBKEY2-ND - KIT DEMO FOR AT90USB
其它名稱: AT90USB647-16AU
AT90USB647-16AU-ND
71
7593L–AVR–09/12
AT90USB64/128
11. I/O-ports
11.1
Introduction
All AVR ports have true Read-Modify-Write functionality when used as general digital I/O ports.
This means that the direction of one port pin can be changed without unintentionally changing
the direction of any other pin with the SBI and CBI instructions. The same applies when chang-
ing drive value (if configured as output) or enabling/disabling of pull-up resistors (if configured as
input). Each output buffer has symmetrical drive characteristics with both high sink and source
capability. The pin driver is strong enough to drive LED displays directly. All port pins have indi-
vidually selectable pull-up resistors with a supply-voltage invariant resistance. All I/O pins have
protection diodes to both V
CC and Ground as indicated in Figure 11-1. Refer to “Electrical char-
acteristics for Atmel AT90USB64/128” on page 390 for a complete list of parameters.
Figure 11-1. I/O pin equivalent schematic.
All registers and bit references in this section are written in general form. A lower case “x” repre-
sents the numbering letter for the port, and a lower case “n” represents the bit number. However,
when using the register or bit defines in a program, the precise form must be used. For example,
PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The physical I/O Regis-
ters and bit locations are listed in “Register description for I/O-ports” on page 89.
Three I/O memory address locations are allocated for each port, one each for the Data Register
– PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The Port Input Pins
I/O location is read only, while the Data Register and the Data Direction Register are read/write.
However, writing a logic one to a bit in the PINx Register, will result in a toggle in the correspond-
ing bit in the Data Register. In addition, the Pull-up Disable – PUD bit in MCUCR disables the
pull-up function for all pins in all ports when set.
Using the I/O port as General Digital I/O is described in “Ports as general digital I/O” on page 72.
Most port pins are multiplexed with alternate functions for the peripheral features on the device.
How each alternate function interferes with the port pin is described in “Alternate port functions”
on page 76. Refer to the individual module sections for a full description of the alternate
functions.
Note that enabling the alternate function of some of the port pins does not affect the use of the
other pins in the port as general digital I/O.
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