參數(shù)資料
型號(hào): AT90USB647-AU
廠商: Atmel
文件頁(yè)數(shù): 83/106頁(yè)
文件大?。?/td> 0K
描述: IC AVR MCU 64K 64TQFP
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 450
系列: AVR®
應(yīng)用: USB 微控制器
核心處理器: AVR
程序存儲(chǔ)器類型: 閃存(64 kB)
控制器系列: AT90 USB
RAM 容量: 4K x 8
接口: 2 線串行,SPI 串行,USART,USB
輸入/輸出數(shù): 48
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP,64-VQFP
包裝: 托盤(pán)
供應(yīng)商設(shè)備封裝: 64-TQFP
配用: ATSTK600-RC17-ND - STK600 ROUTING CARD AVR
ATSTK525-ND - KIT STARTER FOR AT90USB
AT90USBKEY2-ND - KIT DEMO FOR AT90USB
其它名稱: AT90USB647-16AU
AT90USB647-16AU-ND
78
7593L–AVR–09/12
AT90USB64/128
11.3.1
MCUCR – MCU Control Register
Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See “Con-
figuring the pin” on page 72 for more details about this feature.
11.3.2
Alternate functions of Port A
The Port A has an alternate function as the address low byte and data lines for the External
Memory Interface.
Table 11-4 and Table 11-5 on page 79 relates the alternate functions of Port A to the overriding
signals shown in Figure 11-5 on page 76.
Bit
7
6
5
4
3
2
1
0
JTD
–PUD
IVSEL
IVCE
MCUCR
Read/write
R/W
R
R/W
R
R/W
Initial value
0
Table 11-3.
Port A pins alternate functions.
Port pin
Alternate function
PA7
AD7 (External memory interface address and data bit 7)
PA6
AD6 (External memory interface address and data bit 6)
PA5
AD5 (External memory interface address and data bit 5)
PA4
AD4 (External memory interface address and data bit 4)
PA3
AD3 (External memory interface address and data bit 3)
PA2
AD2 (External memory interface address and data bit 2)
PA1
AD1 (External memory interface address and data bit 1)
PA0
AD0 (External memory interface address and data bit 0)
Table 11-4.
Overriding signals for alternate functions in PA7..PA4.
Signal
name
PA7/AD7
PA6/AD6
PA5/AD5
PA4/AD4
PUOE
SRE
PUOV
~(WR | ADA (1))
PORTA7 PUD
~(WR | ADA)
PORTA6 PUD
~(WR | ADA)
PORTA5 PUD
~(WR | ADA)
PORTA4 PUD
DDOE
SRE
DDOV
WR | ADA
PVOE
SRE
PVOV
A7 ADA | D7
OUTPUT WR
A6 ADA | D6
OUTPUT WR
A5 ADA | D5
OUTPUT WR
A4 ADA | D4
OUTPUT WR
DIEOE
0
DIEOV
0
DI
D7 INPUTD6 INPUTD5 INPUTD4 INPUT
AIO
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