參數(shù)資料
型號: AWT6224RM28Q7
廠商: ANADIGICS INC
元件分類: 放大器
英文描述: 880 MHz - 915 MHz RF/MICROWAVE NARROW BAND MEDIUM POWER AMPLIFIER
封裝: 5 X 3 MM, 1 MM HEIGHT, ROHS COMPLIANT, M28, 14 PIN
文件頁數(shù): 1/8頁
文件大小: 356K
代理商: AWT6224RM28Q7
11/2008
AWT6224R
HELP3TM Dual-band 900 MHz/IMT UMTS
3.4 V HSPA Linear Power Amplifier Module
Data Sheet - Rev 2.2
M28 Package
14 Pin 3 mm x 5 mm x 1 mm
Surface Mount Module
FEATURES
InGaP HBT Technology
High Efficiency:
20 % @ +16 dBm POUT
(without DC/DC Converter)
40 % @ maximum POUT
Low Quiescent Current: 8 mA
Internal Voltage Regulation
Common VMODE Control Line
Simplified VCC Bus PCB routing
Reduced External Component Count
Low Profile Surface Mount Package: 1 mm
HSDPA Compliant
RoHS Compliant Package, 250 oC MSL-3
APPLICATIONS
WCDMA/HSPA 900/IMT Dual-Band Wireless
Handsets and Data Devices
PRODUCT DESCRIPTION
The AWT6224 addresses the demand for increased
integration in dual-band handsets for EGSM network
deployments. The small footprint 3 mm x 5 mm
x 1 mm surface mount RoHS compliant package
contains independent RF PA paths to ensure optimal
performance in both frequency bands, while achieving
a 25% PCB space savings compared with solutions
requiring two single-band PAs. The package pinout
was chosen to enable handset manufacturers
to easily route VCC to both power amplifiers and
simplify control with a common VMODE pin. The
device is manufactured on an advanced InGaP HBT
MMIC technology offering state-of-the-art reliability,
temperature stability, and ruggedness. The AWT6224
incorporates ANADIGICS’ HELP3 technology to
provide low power consumption without the need for
an external voltage regulator. Two operating modes
provide optimum efficiency at high and medium/low
power output levels, thereby dramatically increasing
handset talk-time and standby-time. Its built-in voltage
regulator eliminates the need for external voltage
regulation and load switches. The 3 mm x 5 mm x 1
mm surface mount package incorporates matching
networks optimized for output power, efficiency and
linearity in a 50 system.
Figure 1: Block Diagram
Bias Control
VEN_900
VBATT
RFIN_900
RFOUT_900
VCCA
VMODE1
1
13
11
14
12
3
4
2
GND
VCC
5
6
10
9
Bias Control
GND
RFOUT_IMT
VEN_IMT
RFIN_IMT
GNDat slug (pad)
GND
8
7
VMODE2
(N/C)
GND
AWT6224R
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