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April 1995
2
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BS170
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in TO-92
variant envelope and intended for use
in relay, high-speed and
line-transformer drivers.
FEATURES
Very low R
DS(on)
.
Direct interface to C-MOS, TTL,
etc.
High-speed switching.
No secondary breakdown.
PINNING - TO-92 VARIANT
1 = source
2 = gate
3 = drain
QUICK REFERENCE DATA
Drain-source voltage
Gate-source voltage
Drain current (DC)
Total power dissipation up to T
amb
= 25
°
C
Junction temperature
Drain-source ON-resistance
V
GS
= 10 V; I
D
= 200 mA
V
DS
V
GS
I
D
P
tot
T
j
max.
max.
max.
max.
max.
60 V
15 V
500 mA
830 mW
150
°
C
R
DS(on)
max.
5
PIN CONFIGURATION
Fig.1 Simplified outline and symbol.
Note:
Various pin configurations available.
handbook, halfpage
1
3
2
MAM146
s
d
g