
1
2-
POWER DISSIPATION
STANDBY
(I
CCSB1
, Max)
Vcc=
2.2V
1.5V
Operating
(I
CC
, Max)
Vcc=
2.2V
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
SPEED
(ns)
Vcc=
Vcc=
1.5V
PKG TYPE
BS62XV1024SC
BS62XV1024TC
BS62XV1024STC
BS62XV1024SI
BS62XV1024TI
BS62XV1024STI
SOP-32
TSOP-32
STSOP-32
SOP-32
TSOP-32
STSOP-32
+0
O
C to +70
O
C
1.2V ~ 2.4V
250
0.3uA
0.2uA
15mA
10mA
-40
O
C to +85
O
C
1.2V ~ 2.4V
250
1uA
0.8uA
15mA
10mA
Brilliance Semiconductor Inc
.
reserves the right to modify document contents without notice.
Revision 1.0
March 2000
R0201-BS62XV1024
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A7
A12
BSI
Extremely Low Power/Voltage CMOS SRAM
128K X 8 bit
Extremely low operation voltage : 1.2V ~ 2.4V
Extremely low power consumption :
Vcc = 1.5V 10mA (Max.) write current
0.5mA (Max.) read current
0.005uA (Typ.) CMOS standby current
Vcc = 2.2V 15mA (Max.) write current
0.8mA (Max.) read current
0.01uA (Typ.) CMOS standby current
High speed access time :
-25 250ns (Max.)
Input levels are CMOS-compatible
Automatic power down when chip is deselected
Three state outputs
Fully static operation
Data retention supply voltage as low as 1.2V
Easy expansion with CE2, CE1, and OE options
All I/O pins are 3.3V tolerant
The BS62XV1024 is a high performance, extremely low power CMOS
Static Random Access Memory organized as 131,072 words by 8 bits
and operates from an extremely low range of 1.2V to 2.4V supply
voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.005uA and maximum access time of 250ns in 1.5V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62XV1024 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62XV1024 is available in the JEDEC standard 32 pin
525mil Plastic SOP, 8mmx13.4mm STSOP, and 8mmx20mm TSOP.
!
DESCRIPTION
!
FEATURES
!
BLOCK DIAGRAM
!
PRODUCT FAMILY
!
PIN CONFIGURATIONS
Address
Input
Buffer
Row
Decoder
Memory Array
1024 x 1024
Column I/O
Write Driver
Sense Amp
Column Decoder
Data
Buffer
Address Input Buffer
A3 A2 A1 A0 A10
Data
Input
Buffer
Control
Gnd
Vdd
OE
WE
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A14
A16
A15
A9
A11
A8
A13
A6
8
8
8
8
14
128
1024
1024
20
A4
BS62XV1024
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
A5
CE2
BS62XV1024SC
BS62XV1024SI
BS62XV1024TC
BS62XV1024STC
BS62XV1024TI
BS62XV1024STI