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參數(shù)資料
| 型號： | BT864AKPF |
| 英文描述： | Color Encoder Circuit |
| 中文描述： | 顏色編碼器電路 |
| 文件頁數(shù)： | 61/76頁 |
| 文件大?。?/td> | 1050K |
| 代理商： | BT864AKPF |
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Bt864A/865A
3.0 PC Board Considerations
YCrCb to NTSC/PAL Digital Video Encoder
3.4 Signal Interconnect
100138B
Conexant
3-5
3.4 Signal Interconnect
3.4.1 Digital Signal Interconnect
The digital inputs to the Bt864A/865A should be isolated as much as possible
from the analog outputs and other analog circuitry. Also, these input signals
should not overlay the analog power plane or analog output signals.
Most of the noise on the analog outputs will be caused by excessive edge rates
(less than 3 ns), overshoot, undershoot, and ringing on the digital inputs.
The digital edge rates should not be faster than necessary, as feed through
noise is proportional to the digital edge rates. Lower-speed applications will
benefit from using lower-speed logic (3
–
5 ns edge rates) to reduce data-related
noise on the analog outputs.
Transmission lines will mismatch if the lines do not match the source and
destination impedance. This will degrade signal fidelity if the line length
reflection time is greater than one-fourth the signal edge time. Line termination or
line-length reduction is the solution. For example, logic edge rates of 2 ns require
line lengths of less than 4 inches without use of termination. Ringing may be
reduced by damping the line with a series resistor (30
–
300
).
Radiation of digital signals can also be picked up by the analog circuitry. This
is prevented by reducing the digital edge rates (rise/fall time), minimizing ringing
with damping resistors, and minimizing coupling through PC board capacitance
by routing the digital signals at a 90 degree angle to any analog signals.
The clock driver and all other digital devices must be adequately decoupled to
prevent digital noise from coupling into the analog circuitry.
3.4.2 Analog Signal Interconnect
The Bt864A/865A should be located as close as possible to the output connectors
to minimize noise pickup and reflections caused by impedance mismatch.
The analog outputs are susceptible to crosstalk from digital lines; digital traces
must not be routed under or adjacent to the analog output traces.
To maximize the high-frequency power supply rejection, the video output
signals should overlay the ground plane.
For maximum performance, the analog video output impedance, cable
impedance, and load impedance should be the same. The load resistor connection
between the video outputs and AGND should be as close as possible to the
Bt864A/865A to minimize reflections. Unused DAC outputs should be connected
to AGND unless the power-down feature is being utilized.
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PDF描述 |
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| BT865AKPF | Color Encoder Circuit |
| BT867KPF | Color Encoder Circuit |
| BT867KPJ | Color Encoder Circuit |
| BT8920EPJ | Analog-to-Digital Converter， 16-Bit |
| BT8920EPJ600 | Analog-to-Digital Converter， 16-Bit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BT864AKRF | 制造商:CONEXANT 制造商全稱:CONEXANT 功能描述:YCrCb to NTSC/PAL Digital Video Encoder |
| BT864KPF | 制造商:BT 功能描述:COLOR SIGNAL ENCODER, PQFP52 |
| BT864KPF-ES1 | 制造商:BT 功能描述:864KPF-ES1 |
| BT865A | 制造商:CONEXANT 制造商全稱:CONEXANT 功能描述:High Performance YCrCb to NTSC/PAL Digital Video Encoders |
| BT865AKPF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Encoder Circuit |
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