參數(shù)資料
型號: BU-61845G4-132K
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, MQFP72
封裝: GULL WING, PACKAGE-72
文件頁數(shù): 45/56頁
文件大小: 321K
代理商: BU-61845G4-132K
5
BC General Purpose Queue Pointer /
RT-MT Interrupt Status Queue Pointer Register
(RD/WR)
1
BC General Purpose Flag Register (WR)
Interrupt Mask Register #2 (RD/WR)
RESERVED
1
0
1
0
1
0
1
0
1
Interrupt Status Register #2 (RD)
BC Condition Code Register (RD)
BIT Test Status Register (RD)
Configuration Register #7 (RD/WR)
0
1
0
1
0
1
0
1
0
1
Configuration Register #6 (RD/WR)
0
1
Test Mode Register 7
1
0
1
Test Mode Register 6
Test Mode Register 4
Test Mode Register 2
0
1
0
1
0
1
Test Mode Register 5
Test Mode Register 3
Test Mode Register 1
1
0
1
0
1
0
1
0
1
Test Mode Register 0
0
1
RT BIT Word Register (RD)
1
0
RT Status Word Register (RD)
0
1
0
Non-Enhanced BC Frame Time / Enhanced BC
Initial Instruction Pointer / RT Last Command /
MT Trigger Word Register(RD/WR)
1
0
1
0
BC Time Remaining to Next Message Register
(RD)
0
1
0
BC Frame Time Remaining Register (RD)
1
0
1
0
RT / Monitor Data Stack Address Register (RD)
0
1
0
1
0
Configuration Register #5 (RD/WR)
1
0
1
0
Configuration Register #4 (RD/WR)
0
1
0
Configuration Register #3 (RD/WR)
1
0
Interrupt Status Register #1 (RD)
0
1
0
Time Tag Register (RD/WR)
1
0
1
0
BC Control Word /
RT Subaddress Control Word Register (RD/WR)
0
1
0
Non-Enhanced BC/RT Command Stack Pointer /
Enhanced BC Instruction List Pointer Register
(RD)
1
0
Start/Reset Register (WR)
1
0
Configuration Register #2 (RD/WR)
0
1
0
Configuration Register #1 (RD/WR)
1
0
Interrupt Mask Register #1 (RD/WR)
0
A0
A1
A2
A3
A4
REGISTER
DESCRIPTION/ACCESSIBILITY
ADDRESS LINES
TABLE 2. ADDRESS MAPPING
INTERNAL REGISTERS
The address mapping for the Enhanced Mini-ACE registers is illustrated in TABLE 2:
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