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參數(shù)資料
| 型號： | BU-62843 |
| 英文描述： | MIL-STD-1553 Components |PCI-Enhanced Mini-ACE? |
| 中文描述： | 符合MIL - STD - 1553器件|的PCI增強(qiáng)迷你ACE論壇？ |
| 文件頁數(shù)： | 32/56頁 |
| 文件大小： | 368K |
| 代理商： | BU-62843 |
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32
Data Device Corporation
www.ddc-web.com
BU-62743/62843/62864
A-03/03-1M
RT DESCRIPTOR STACK
The descriptor stack provides a chronology of all messages
processed by the PCI Enhanced Mini-ACE RT. Reference FIG-
URE 6 and FIGURE 7. Similar to BC mode, there is a four-word
block descriptor in the Stack for each message processed. The
four entries to each block descriptor are the Block Status Word,
Time Tag Word, the pointer to the start of the message's data
block, and the 16-bit received Command Word.
The RT Block Status Word includes indications of whether a par-
ticular message is ongoing or has been completed, what bus
channel it was received on, indications of illegal commands, and
flags denoting various message error conditions. For the subad-
dress circular buffering, and global circular buffering modes, the
data block pointer may be used for locating the data blocks for
specific messages. Note that for mode code commands, there is
an option to store the transmitted or received data word as the
third word of the descriptor, in place of the data block pointer.
The Time Tag Word provides a 16-bit indication of relative time
for individual messages. The resolution of the PCI Enhanced
Mini-ACE's time tag is programmable from among 2, 4, 8, 16, 32,
or 64 μs/LSB.There is also a provision for using an external clock
input for the time tag (consult factory). If enabled, there is a time
tag rollover interrupt, which is issued when the value of the time
tag rolls over from FFFF(hex) to 0.Other time tag options include
the capabilities to clear the time tag register following receipt of
a Synchronize (without data) mode command and/or to set the
time tag following receipt of a Synchronize (with data) mode
command. For that latter, there is an added option to filter the
"set" capability based on the LSB of the received data word
being equal to logic "0".
RT INTERRUPTS
The PCI Enhanced Mini-ACE offers a great deal of flexibility in
terms of RT interrupt processing.By means of the PCI Enhanced
Mini-ACE's two Interrupt Mask Registers, the RT may be pro-
grammed to issue interrupt requests for the following events/con-
ditions: End-of-(every)Message, Message Error, Selected (trans-
mit or receive) Subaddress, 100% Circular Buffer Rollover, 50%
Circular Buffer Rollover, 100% Descriptor Stack Rollover, 50%
Descriptor Stack Rollover, Selected Mode Code, Transmitter
Timeout, Illegal Command, and Interrupt Status Queue Rollover.
INTERRUPTS FOR 50% ROLLOVERS OF STACKS,
CIRCULAR BUFFERS
The PCI Enhanced Mini-ACE RT and Monitor are capable of
issuing host interrupts when a subaddress circular buffer pointer
or stack pointer crosses its mid-point boundary. For RT circular
buffers, this is applicable for both transmit and receive subad-
dresses. Reference FIGURE 8. There are four interrupt mask
and interrupt status register bits associated with the 50% rollover
function:
(1)
RT circular buffer;
(2)
RT command (descriptor) stack;
(3)
Monitor command (descriptor) stack; and
(4)
Monitor data stack.
The 50% rollover interrupt is beneficial for performing bulk data
transfers. For example, when using circular buffering for a partic-
ular receive subaddress, the 50% rollover interrupt will inform the
DATA POINTER
CIRCULAR
BUFFER*
(128,256,...8192 WORDS)
LOOK-UP TABLE
RECEIVED
(TRANSMITTED)
MESSAGE DATA
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND WORD
DESCRIPTOR STACK
50%
ROLLOVER
INTERRUPT
50%
The example shown is for an RT Subaddress Circular Buffer.
The 50% and 100% Rollover Interrupts are also applicable to
the RT Global Circulat Buffer, RT Command Stack,
Monitor Command Stack, and Monitor Data Stack.
FIGURE 8. 50% AND 100% ROLLOVER INTERRUPTS
Note
100%
ROLLOVER
INTERRUPT
100%
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