38
Data Device Corporation
www.ddc-web.com
BU-62743/62843/62864
A-03/03-1M
The format of the information in the data stack depends on the
format of the message that was processed. For example, for a
BC-to-RT transfer (receive command), the monitor will store the
command word in the monitor command descriptor stack, with
the data words and the receiving RT's status word stored in the
monitor data stack.
The size of the monitor command stack is programmable, with
choices of 256, 1K, 4K, or 16K words. The monitor data stack
size is programmable with choices of 512, 1K, 2K, 4K, 8K, 16K,
32K or 64K words.
MONITOR INTERRUPTS
Selective monitor interrupts may be issued for End-of-message
and for conditions relating to the monitor command stack pointer
and monitor data stack pointer. The latter, which are shown in
FIGURE 8, include Command Stack 50% Rollover, Command
Stack 100% Rollover, Data Stack 50% Rollover, and Data Stack
100% Rollover.
The 50% rollover interrupts may be used to inform the host
processor when the command stack or data stack is half full. At
that time, the host may proceed to read the received messages
in the upper half of the respective stack, while the PCI Enhanced
Mini-ACE monitor writes messages to the lower half of the stack.
Later, when the monitor issues a 100% stack rollover interrupt,
the host can proceed to read the received data from the lower
half of the stack, while the PCI Enhanced Mini-ACE monitor con-
tinues to write received data words to the upper half of the stack.
INTERRUPT STATUS QUEUE
Like the PCI Enhanced Mini-ACE RT, the Selective Monitor
mode includes the capability for generating an interrupt status
queue. As illustrated in FIGURE 9, this provides a chronological
history of interrupt generating events. Besides the two Interrupt
Mask Registers, the Interrupt Status Queue provides additional
filtering capability, such that only valid messages and/or only
invalid messages may result in entries to the Interrupt Status
Queue. The interrupt status queue is 64 words deep, providing
the capability to store entries for up to 32 monitored messages.
MISCELLANEOUS
1553 CLOCK INPUT
The PCI Enhanced Mini-ACE decoder is capable of operating
from a 10, 12, 16, or 20 MHz clock input. The clock frequency
may be specified by means of the host processor writing to
Configuration Register #6.
ENCODER/DECODERS
For the selected clock frequency, there is internal logic to derive
the necessary clocks for the Manchester encoder and decoders.
For all clock frequencies, the decoders sample the receiver out-
puts on both edges of the input clock. By in effect doubling the
decoders' sampling frequency, this serves to widen the tolerance
to zero-crossing distortion, and reduce the bit error rate.
TIME TAG
The PCI Enhanced Mini-ACE includes an internal read/writable
Time Tag Register. This register is a CPU read/writable 16-bit
counter with a programmable resolution of either 2, 4, 8, 16, 32,
or 64 μs per LSB. Another option allows software controlled
incrementing of the Time Tag Register.This supports self-test for
the Time Tag Register. For each message processed, the value
of the Time Tag Register is loaded into the second location of the
respective descriptor stack entry ("TIME TAG WORD") for
BC/RT/MT modes.
The functionality of the Time Tag Register is compatible with
ACE/Mini-ACE (Plus) and includes: the capability to issue an
interrupt request and set a bit in the Interrupt Status Register
when the Time Tag Register rolls over FFFF to 0000; for RT
mode, the capability to automatically clear the Time Tag Register
following reception of a Synchronize (without data) mode com-
mand, or to load the Time Tag Register following a Synchronize
(with data) mode command.
Additional time tag features supported by the PCI Enhanced
Mini-ACE include the capability for the BC to transmit the con-
tents of the Time Tag Register as the data word for a
Synchronize (with data) mode command; the capability for the
RT to "filter" the data word for the Synchronize with data mode
command, by only loading the Time Tag Register if the LSB of
the received data word is "0"; an instruction enabling the BC
Message Sequence Control engine to autonomously load the
Monitor Command Stack Pointer B (fixed location)
Monitor Data Stack Pointer B (fixed location)
Monitor Data Stack A
0800-0FFF
Monitor Command Stack A
0400-07FF
Not Used
0300-03FF
Selective Monitor Lookup Table
0280-02FF
Not Used
0108-027F
0107
Not Used
0104-0105
0106
Monitor Data Stack Pointer A (fixed location)
0103
Monitor Command Stack Pointer A (fixed location)
0102
Not Used
0100-0101
DESCRIPTION
ADDRESS (HEX)
TABLE 61. TYPICAL SELECTIVE MESSAGE
MONITOR MEMORY MAP (shown for 4K RAM for
“Monitor only” mode)