- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369546 > BU-6586NEW MIL-STD-1553 Components |PCI Mini-ACE? Mark3 PDF資料下載
參數(shù)資料
| 型號： | BU-6586NEW |
| 英文描述： | MIL-STD-1553 Components |PCI Mini-ACE? Mark3 |
| 中文描述： | 符合MIL - STD - 1553器件|迷你的PCI ACE論壇？ Mark3 |
| 文件頁數(shù)： | 26/60頁 |
| 文件大小： | 410K |
| 代理商： | BU-6586NEW |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
26
Data Device Corporation
www.ddc-web.com
BU-64743/64843/64863
C-03/03-300
SINGLE BUFFERED MODE
The operation of the single buffered RT mode is illustrated in
FIGURE 6. In the single buffered mode, the respective lookup
table entry must be written by the host processor. Received data
words are written to, or transmitted data words are read from the
data word block with starting address referenced by the lookup
table pointer. In the single buffered mode, the current lookup
table pointer is not updated by the Mini-ACE Mark3 memory
management logic. Therefore, if a subsequent message is
received for the same subaddress, the
same
Data Word block
will be overwritten or overread.
SUBADDRESS DOUBLE BUFFERING MODE
The Mini-ACE Mark3 provides a double buffering mechanism for
received data, that may be selected on an individual subaddress
basis for any or all receive (and/or broadcast) subaddresses.This
is illustrated in FIGURE 7. It should be noted that the Subaddress
Double Buffering mode is applicable for receive data only,
not for
transmit data.
Double buffering of transmit messages may be
easily implemented by software techniques.
The purpose of the subaddress double buffering mode is to pro-
vide data sample consistency to the host processor. This is
accomplished by allocating
two
32-word data word blocks for each
individual receive (and/or broadcast receive) subaddress. At any
given time, one of the blocks will be designated as the "active"
1553 block while the other will be considered as "inactive". The
data words for the next receive command to that subaddress will
be stored in the active block.Following receipt of a valid message,
the Mini-ACE Mark3 will automatically switch the active and inac-
tive blocks for that subaddress. As a result, the latest, valid, com-
plete data block is always accessible to the host processor.
CIRCULAR BUFFER MODE
The operation of the Mini-ACE Mark3's circular buffer RT mem-
ory management mode is illustrated in FIGURE 8. As in the sin-
gle buffered and double buffered modes, the individual lookup
table entries are initially loaded by the host processor. At the
start of each message, the lookup table entry is stored in the
third position of the respective message block descriptor in the
descriptor stack area of RAM. Receive or transmit data words
are transferred to (from) the circular buffer, starting at the loca-
tion referenced by the lookup table pointer.
In general, the location after the last data word written or read
(modulo the circular buffer size) during the message is written to
the respective lookup table location during the end-of-message
sequence.By so doing, data for the next message for the respec-
tive transmit, receive(/broadcast), or broadcast subaddress will
be accessed from the next lower contiguous block of locations in
the circular buffer.
For the case of a receive (or broadcast receive) message with a
data word error, there is an option such that the lookup table
pointer will only be updated following receipt of a
valid
message.
That is, the pointer will
not
be updated following receipt of a
message with an error in a data word. This allows failed mes-
sages in a bulk data transfer to be retried without disrupting the
circular buffer data structure, and without intervention by the
RT's host processor.
GLOBAL CIRCULAR BUFFER
Beyond the programmable choice of single buffer mode, double
buffer mode, or circular buffer mode, programmable on an individ-
ual subaddress basis, the Mini-ACE Mark3 RT architecture pro-
FIGURE 6. RT SINGLE BUFFERED MODE
DATA
BLOCKS
DATA BLOCK
DATA BLOCK
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND
WORD
DESCRIPTOR
STACKS
LOOK-UP
TABLE ADDR
LOOK-UP TABLE
(DATA BLOCK ADDR)
15
13
0
CURRENT
AREA B/A
CONFIGURATION
REGISTER
STACK
POINTERS
(See note)
Note: Lookup table is not used for mode commands when enhanced mode codes are enabled.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BU-69200 | MIL-STD-1553 Components |ACE-Core |
| BU05MC | COMMON MODE CHOKE COILS (FOR DC AND SIGNAL LINES) SMD TYPE |
| BU105 | Transient Voltage Suppressor Diodes |
| BUY11 | Bipolar NPN Device |
| BU12006 | Transient Voltage Suppressor Diodes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BU-65-9 | 功能描述:測試電夾 HEAVY DUTY LARGE JAW GATOR CLIP WHITE RoHS:否 制造商:Pomona Electronics 類型:Minigrabber clip 顏色:Black |
| BU6650NUX | 制造商:ROHM 制造商全稱:Rohm 功能描述:3ch CMOS LDO Regulators |
| BU6650NUX_11 | 制造商:ROHM 制造商全稱:Rohm 功能描述:3ch CMOS LDO Regulators |
| BU6650NUX-TR | 功能描述:低壓差穩(wěn)壓器 - LDO LDO REG 0.2A 8PIN 2.8V 2.8V 1.8V RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| BU6651NUX | 制造商:ROHM 制造商全稱:Rohm 功能描述:High-speed Load Response Full CMOS LDP Regulators |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。