參數(shù)資料
型號: C8051F019R
廠商: Silicon Laboratories Inc
文件頁數(shù): 103/154頁
文件大小: 0K
描述: IC 8051 MCU 16K FLASH 48TQFP
標(biāo)準(zhǔn)包裝: 1
系列: C8051F018
核心處理器: 8051
芯體尺寸: 8-位
速度: 25MHz
連通性: SMBus(2 線/I²C),SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TQFP
包裝: 剪切帶 (CT)
其它名稱: 336-1049-1
C8051F018
C8051F019
8.3.
SPECIAL FUNCTION REGISTERS
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers (SFRs). The
SFRs provide control and data exchange with the CIP-51’s resources and peripherals. The CIP-51 duplicates the
SFRs found in a typical 8051 implementation as well as implementing additional SFRs used to configure and access
the sub-systems unique to the MCU. This allows the addition of new functionality while retaining compatibility
with the MCS-51 instruction set. Table 8.3 lists the SFRs implemented in the CIP-51 System Controller.
The SFR registers are accessed any time the direct addressing mode is used to access memory locations from 0x80
to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, P1, SCON, IE, etc.) are bit-addressable as well
as byte-addressable.
All other SFRs are byte-addressable only.
Unoccupied addresses in the SFR space are
reserved for future use. Accessing these areas will have an indeterminate effect and should be avoided. Refer to the
corresponding pages of the datasheet, as indicated in Table 8.3, for a detailed description of each register.
Table 8.2. Special Function Register Memory Map
F8
SPI0CN
PCA0H
PCA0CPH0
PCA0CPH1
PCA0CPH2
PCA0CPH3
PCA0CPH4
WDTCN
F0
B
EIP1
EIP2
E8
ADC0CN
PCA0L
PCA0CPL0
PCA0CPL1
PCA0CPL2
PCA0CPL3
PCA0CPL4
RSTSRC
E0
ACC
XBR0
XBR1
XBR2
EIE1
EIE2
D8
PCA0CN
PCA0MD
PCA0CPM0
PCA0CPM1
PCA0CPM2
PCA0CPM3
PCA0CPM4
D0
PSW
REF0CN
C8
T2CON
RCAP2L
RCAP2H
TL2
TH2
SMB0CR
C0
SMB0CN
SMB0STA
SMB0DAT
SMB0ADR
ADC0GTL
ADC0GTH
ADC0LTL
ADC0LTH
B8
IP
AMX0CF
AMX0SL
ADC0CF
ADC0L
ADC0H
B0
P3
OSCXCN
OSCICN
FLSCL
FLACL
A8
IE
PRT1IF
EMI0CN
A0
P2
PRT0CF
PRT1CF
PRT2CF
PRT3CF
98
SCON
SBUF
SPI0CFG
SPI0DAT
SPI0CKR
CPT0CN
CPT1CN
90
P1
TMR3CN
TMR3RLL
TMR3RLH
TMR3L
TMR3H
88
TCON
TMOD
TL0
TL1
TH0
TH1
CKCON
PSCTL
80
P0
SP
DPL
DPH
PCON
0(8)
1(9)
2(A)
3(B)
4(C)
5(D)
6(E)
7(F)
Bit Addressable
Table 8.3. Special Function Registers
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Address
Register
Description
Page No.
0xE0
ACC
Accumulator
0xBC
ADC0CF
ADC Configuration
0xE8
ADC0CN
ADC Control
0xC5
ADC0GTH
ADC Greater-Than Data Word (High Byte)
0xC4
ADC0GTL
ADC Greater-Than Data Word (Low Byte)
0xBF
ADC0H
ADC Data Word (High Byte)
0xBE
ADC0L
ADC Data Word (Low Byte)
0xC7
ADC0LTH
ADC Less-Than Data Word (High Byte)
0xC6
ADC0LTL
ADC Less-Than Data Word (Low Byte)
Rev. 1.2
52
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