鍨嬭櫉(h脿o)锛� | C8051T600SDB |
寤犲晢锛� | Silicon Laboratories Inc |
鏂囦欢闋佹暩(sh霉)锛� | 116/188闋� |
鏂囦欢澶�?銆�?/td> | 0K |
鎻忚堪锛� | BOARD SOCKET DAUGHTER SOIC |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
妯″/鏉块鍨嬶細 | SOIC 鎻掑骇妯″ |
閬╃敤浜庣浉闂�(gu膩n)鐢�(ch菐n)鍝侊細 | C8051T600DK |
鍏跺畠鍚嶇ū锛� | 336-1405 |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
---|---|
C8051T606TDB | CARD DAUGHTER MSOP SOCKET |
IDC5020ER102M | INDUCTOR POWER 1000UH 0.3A SMD |
IDC5020ER101M | INDUCTOR POWER 100UH 1.3A SMD |
IDC5020ER100M | INDUCTOR POWER 10UH 3.9A SMD |
PN-F672-E3 | ADAPTER 672-FPBGA LATTICEECP3 |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
---|---|
C8051T600-SDB | 鍒堕€犲晢:Silicon Laboratories Inc 鍔熻兘鎻忚堪:Evaluation Board For Mixed Signal OTP EPROM MCU Family 鍒堕€犲晢:Silicon Laboratories Inc 鍔熻兘鎻忚堪:SOIC SOCKET DAUGHTER BOARD FOR C8051T60X - Boxed Product (Development Kits) |
C8051T601 | 鍒堕€犲晢:SILABS 鍒堕€犲晢鍏ㄧū:SILABS 鍔熻兘鎻忚堪:Mixed Signal OTP EPROM MCU Family |
C8051T601-GM | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8K OTP 11Pin QFN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
C8051T601-GMR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8K OTP 11Pin QFN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
C8051T601-GS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8K OTP 14Pin SOIC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |