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參數(shù)資料
| 型號： | CA3130SX |
| 英文描述： | TRANSIL |
| 中文描述： | 電壓反饋運算放大器 |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 617K |
| 代理商： | CA3130SX |
2-115
CA3130, CA3130A
FIGURE 12. TYPICAL INCREMENTAL OFFSET-VOLTAGE
SHIFT vs OPERATING LIFE
(A) DUAL POWER-SUPPLY OPERATION
(B) SINGLE POWER-SUPPLY OPERATION
FIGURE 13. CA3130 OUTPUT STAGE IN DUAL AND SINGLE
POWER-SUPPLY OPERATION
T
A
= +125
o
C FOR TO-5 PACKAGES
7
6
5
4
3
2
1
0
500
1000
1500
2000 2500
3000 3500
4000
O
TIME (HOURS)
DIFFERENTIAL DC VOLTAGE
(ACROSS TERMS 2 AND 3) = 0V
OUTPUT VOLTAGE = V+ / 2
DIFFERENTIAL DC VOLTAGE
(ACROSS TERMS 2 AND 3) = 2V
OUTPUT STAGE TOGGLED
0
3
2
8
4
7
6
R
L
POSITIVE
SUPPLY
NEGATIVE
SUPPLY
Q8
Q12
CA3130
+
-
+
+
-
-
3
2
8
4
7
6
R
L
POSITIVE
SUPPLY
Q8
Q12
CA3130
+
-
+
-
Power-Supply Considerations
Because the CA3130 is very useful in single-supply applica-
tions, it is pertinent to review some considerations relating to
power-supply current consumption under both single-and
dual-supply service. Figures 13A and 13B show the CA3130
connected for both dual-and single-supply operation.
Dual-supply Operation: When the output voltage at Term. 6
is zero-volts, the currents supplied by the two power supplies
are equal. When the gate terminals of Q8 and Q12 are
driven increasingly positive with respect to ground, current
flow through Q12 (from the negative supply) to the load is
increased and current flow through Q8 (from the positive
supply) decreases correspondingly. When the gate terminals
of Q8 and Q12 are driven increasingly negative with respect
to ground, current flow through Q8 is increased and current
flow through Q12 is decreased accordingly.
Single-supply Operation: Initially, let it be assumed that the
value of R
L
is very high (or disconnected), and that the input-
terminal bias (Terms. 2 and 3) is such that the output termi-
nal (No. 6) voltage is at V+/2, i.e., the voltage-drops across
Q8 and Q12 are of equal magnitude. Figure 6 shows typical
quiescent supply-current vs supply-voltage for the CA3130
operated under these conditions. Since the output stage is
operating as a Class A amplifier, the supply-current will
remain constant under dynamic operating conditions as long
as the transistors are operated in the linear portion of their
voltage-transfer characteristics (see Figure 5). If either Q8 or
Q12 are swung out of their linear regions toward cut-off (a
non-linear region), there will be a corresponding reduction in
supply-current. In the extreme case, e.g., with Term. 8
swung down to ground potential (or tied to ground), NMOS
transistor Q12 is completely cut off and the supply-current to
series-connected transistors Q8, Q12 goes essentially to
zero. The two preceding stages in the CA3130, however,
continue to draw modest supply-current (see the lower curve
in Figure 6) even though the output stage is strobed off. Fig-
ure 13A shows a dual-supply arrangement for the output
stage that can also be strobed off, assuming R
L
=
∞
by pull-
ing the potential of Term. 8 down to that of Term. 4.
Let it now be assumed that a load-resistance of nominal
value (e.g., 2 kilohms) is connected between Term. 6 and
ground in the circuit of Figure 13B. Let it further be assumed
again that the input-terminal bias (Terms. 2 and 3) is such
that the output terminal (No. 6) voltage is at V+/2. Since
PMOS transistor Q8 must now supply quiescent current to
both R
L
and transistor Q12, it should be apparent that under
these conditions the supply-current must increase as an
inverse function of the R
L
magnitude. Figure 8 shows the
voltage-drop across PMOS transistor Q8 as a function of
load current at several supply voltages. Figure 5 shows the
voltage-transfer characteristics of the output stage for sev-
eral values of load resistance.
Wideband Noise
From the standpoint of low-noise performance consider-
ations, the use of the CA3130 is most advantageous in appli-
cations where in the source resistance of the input signal is
on the order of 1 megohm or more. In this case, the total
input-referred noise voltage is typically only 23
μ
V when the
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