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20
201-0000-033 Rev 1.0, 6/2/99
CHRONTEL
CH5101A
Frame Rate Register
Symbol:FR
Address:01h
Bits:3
Register FR determines the frame rate. The frame rate is adjusted by increasing the number of blank lines after
reading the entire array, or by inserting extra blank pixels at the end of each line readout. The method of frame rate
control is determined by bit ELFA in register MOF. When ELFA = 0, the amount of delay between the completion
of reading one frame and the start of reading the next frame is varied. There are eight frame rates that can be
selected in this mode, each one a fixed integer number of lines long. When ELFA = 1, the amount of delay between
the completion of reading one lin
e
, and the start of reading the next line is varied. There are seven frame rates that
can be selected in this mode, each one 289 lines.
In modes M[2:0] equal to 0-3, the device can operate with a 24MHz MCLK or a 27MHz MCLK. Tables describing
some of the key parameters are shown in
Tables 8 & 9
.
BIT:
7
6
5
4
3
2
1
0
SYMBOL:
TYPE:
RNUM3
RNUM2
RNUM1
RNUM0
FR2
FR1
FR0
R
R
R
R
R/W
R/W
R/W
DEFAULT:
0
0
1
0
0
0
0
Table 8. Operating Modes For 27 MHz MCLK
ELFA
M
[2:0]
FR
[2:0]
Total
Lines
Blank
Lines /
Frame
MCLK /
Line
Blank
MCLK /
Line
Frame
Rate
(Hz)
Max Shutter
Length (reg-
ister value)
Max
Shutter
Time
(mS)
0
0
0
0
0
0
0
0
x
x
1
1
1
1
1
1
1
1,3
1,3
1,3
1,3
1,3
1,3
1,3
1,3
4
5
1,3
1,3
1,3
1,3
1,3
1,3
1,3
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
x
x
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
525
656
787
1049
1312
1967
3934
15735
263 / 262
313 / 312
289
289
289
289
289
289
289
236
367
498
760
1023
1678
3645
15446
23 / 22
25 / 24
1716
1716
1716
1716
1716
1716
1716
1716
1716
1728
3896
4672
6232
7784
11680
23360
93424
308
308
308
308
308
308
308
308
30
24
20
15
12
8
4
1
60
50
24
20
15
12
8
4
1
112,398
140,497
168,597
224,796
281,209
421,707
843,628
2,097,151
55,984
67,176
140,256
168,192
224,352
280,224
420,480
840,960
2,097,151
33
42
50
67
83
125
250
621
17
20
42
50
66
83
125
249
621
1080
1856
3416
4968
8864
20544
90608