參數(shù)資料
型號: CP2112-F01-GM
廠商: Silicon Laboratories Inc
文件頁數(shù): 7/22頁
文件大?。?/td> 0K
描述: IC HID USB-TO-SMBUS BRIDGE 24QFN
產(chǎn)品培訓(xùn)模塊: CP21xx USB Bridge
標(biāo)準(zhǔn)包裝: 75
應(yīng)用: USB 至 SMBus 電橋
接口: SMBus,USB
電源電壓: 1.8V,3 V ~ 3.6 V
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN(4x4)
包裝: 管件
安裝類型: 表面貼裝
配用: 336-2010-ND - KIT EVAL FOR CP2112
其它名稱: 336-2004-5
CP2112
Rev. 1.2
15
Figure 8. Typical CP2112 Addressed Read
6.3. CP2112 Configuration Options
The CP2112 has the following SMBus configuration options, which are all configured through USB: clock speed,
device address, auto send read, read timeout, write timeout, SCL low timeout, and retry time.
The SMBus clock speed is configurable with a recommended operating range of 10 kHz to 400 kHz.
The device address is a configurable 7-bit address, which is the slave address of the CP2112. Although the
CP2112 is a master device, the CP2112 will ACK this address but will not respond to any read or write requests.
If the least significant bit is set, the CP2112 will ignore it.
If auto read send is set to 0x01, the CP2112 will return the results of a read automatically. If this is set to 0x00,
the device will wait for a “data read response” request to respond to data.
The read and write timeouts are the time limit before the device will automatically cancel a transfer that has
been initiated and can range from 0 to 1000 ms. If set to 0 ms, this indicates that there is no timeout.
The SCL low timeout is either enabled or disabled. If the SCL line is held low by a slave device on the bus, no
further communication is possible. Furthermore, the master cannot force the SCL line high to correct the error
condition. To solve this problem, the SMBus protocol specifies that devices participating in a transfer must
detect any clock cycle held low longer than 25 ms as a “timeout” condition. Devices that have detected the
timeout condition must reset the communication no later than 10 ms after detecting the timeout condition.
The retry time is the number of times the device will attempt a transfer before terminating the transfer. This can
be set from 0 to 1000. If set to 0, there is no retry limit.
These configuration options cannot be changed while a transfer is in progress.
Repeated
START
Read (1)
Slave Address + Read
SLA6-0
SDA
Write (0)
ADDR7-0
SCL
Slave Address + Write
Data Byte
START
ACK
Logical
Address
SLA6-0
DATA7-0
NACK
STOP
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